Resistance Drift in Melt-Quenched Ge2Sb2Te5 Phase Change Memory Line Cells at Cryogenic Temperatures

We characterized resistance drift in phase change memory devices in the 80 K to 300 K temperature range by performing measurements on 20 nm thick, ~70 – 100 nm wide lateral Ge2Sb2Te5 (GST) line cells. The cells were amorphized using 1.5 – 2.5 V pulses with ~50 – 100 ns duration leading to ~0.4 – 1.1 mA peak reset currents resulting in amorphized lengths between ~50 and 700 nm. Resistance drift coefficients in the amorphized cells are calculated using constant voltage measurements starting as fast as within a second after amorphization and for 1 hour duration. Drift coefficients range between ~0.02 and 0.1 with significant device-to-device variability and variations during the measurement period. At lower temperatures (higher resistance states) some devices show a complex dynamic behavior, with the resistance repeatedly increasing and decreasing significantly over periods in the order of seconds. These results point to charge trapping and de-trapping events as the cause of resistance drift.