Injune Yeo;Wangxin He;Yuan-Chun Luo;Shimeng Yu;Jae-Sun Seo
{"title":"针对非易失性铁电电容式交叉排列的动态只需电源的内存计算宏程序与两功率非线性 SAR ADC","authors":"Injune Yeo;Wangxin He;Yuan-Chun Luo;Shimeng Yu;Jae-Sun Seo","doi":"10.1109/LSSC.2024.3361011","DOIUrl":null,"url":null,"abstract":"Analog computing-in-memory (CIM) using emerging resistive nonvolatile memory (NVM) technologies faces challenges, such as static power consumption, current flow-induced IR drop, and the need for multiple power-hungry ADCs. In this letter, we present ferroelectric capacitive array (FCA)-based energy/area-efficient CIM macro used for charge-domain multiply-and-accumulate operations, which addresses the challenges of resistive NVM CIMs. The proposed CIM macro involves encoding ternary input activations and weights into voltages, and enabling parasitic insensitive charge readout. A power-of-two nonlinear SAR ADC is introduced, designed for energy-efficiency and hardware-friendliness. This ADC employs adaptive conversion skipping based on input voltage, resulting in fine precision for concentrated input levels and coarse conversion for sparse input levels. The proposed FCA-based CIM macro in 180-nm CMOS demonstrates \n<inline-formula> <tex-math>$16\\times 8$ </tex-math></inline-formula>\n analog MAC operation with an energy efficiency of 1.75 TOPS/W and classification accuracy of 90.2% is obtained for the CIFAR-10 dataset.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"7 ","pages":"70-73"},"PeriodicalIF":2.2000,"publicationDate":"2024-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Dynamic Power-Only Compute-in-Memory Macro With Power-of-Two Nonlinear SAR ADC for Nonvolatile Ferroelectric Capacitive Crossbar Array\",\"authors\":\"Injune Yeo;Wangxin He;Yuan-Chun Luo;Shimeng Yu;Jae-Sun Seo\",\"doi\":\"10.1109/LSSC.2024.3361011\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Analog computing-in-memory (CIM) using emerging resistive nonvolatile memory (NVM) technologies faces challenges, such as static power consumption, current flow-induced IR drop, and the need for multiple power-hungry ADCs. In this letter, we present ferroelectric capacitive array (FCA)-based energy/area-efficient CIM macro used for charge-domain multiply-and-accumulate operations, which addresses the challenges of resistive NVM CIMs. The proposed CIM macro involves encoding ternary input activations and weights into voltages, and enabling parasitic insensitive charge readout. A power-of-two nonlinear SAR ADC is introduced, designed for energy-efficiency and hardware-friendliness. This ADC employs adaptive conversion skipping based on input voltage, resulting in fine precision for concentrated input levels and coarse conversion for sparse input levels. The proposed FCA-based CIM macro in 180-nm CMOS demonstrates \\n<inline-formula> <tex-math>$16\\\\times 8$ </tex-math></inline-formula>\\n analog MAC operation with an energy efficiency of 1.75 TOPS/W and classification accuracy of 90.2% is obtained for the CIFAR-10 dataset.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"7 \",\"pages\":\"70-73\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10418459/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10418459/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
A Dynamic Power-Only Compute-in-Memory Macro With Power-of-Two Nonlinear SAR ADC for Nonvolatile Ferroelectric Capacitive Crossbar Array
Analog computing-in-memory (CIM) using emerging resistive nonvolatile memory (NVM) technologies faces challenges, such as static power consumption, current flow-induced IR drop, and the need for multiple power-hungry ADCs. In this letter, we present ferroelectric capacitive array (FCA)-based energy/area-efficient CIM macro used for charge-domain multiply-and-accumulate operations, which addresses the challenges of resistive NVM CIMs. The proposed CIM macro involves encoding ternary input activations and weights into voltages, and enabling parasitic insensitive charge readout. A power-of-two nonlinear SAR ADC is introduced, designed for energy-efficiency and hardware-friendliness. This ADC employs adaptive conversion skipping based on input voltage, resulting in fine precision for concentrated input levels and coarse conversion for sparse input levels. The proposed FCA-based CIM macro in 180-nm CMOS demonstrates
$16\times 8$
analog MAC operation with an energy efficiency of 1.75 TOPS/W and classification accuracy of 90.2% is obtained for the CIFAR-10 dataset.