Stephen A. Mancini;Seung Yup Jang;Zeyu Chen;Dongyoung Kim;Alex Bialy;Balaji Raghotamacher;Michael Dudley;Nadeemullah Mahadik;Robert Stahlbush;Mowafak Al-Jassim;Woongje Sung
{"title":"使用所有 \"室温 \"离子注入法制造的 1.2kV 4H-SiC MOSFET 静态性能调查","authors":"Stephen A. Mancini;Seung Yup Jang;Zeyu Chen;Dongyoung Kim;Alex Bialy;Balaji Raghotamacher;Michael Dudley;Nadeemullah Mahadik;Robert Stahlbush;Mowafak Al-Jassim;Woongje Sung","doi":"10.1109/JEDS.2024.3359974","DOIUrl":null,"url":null,"abstract":"Several different designs of 1.2kV-rated 4H-SiC MOSFETs have been successfully fabricated under various ion implantation conditions. Implantation conditions consisted of different P+ profiles and implantation temperatures of both room temperature (25°C) and elevated temperatures (600°C) in order to monitor subsequent lattice damage. Through the use of X-Ray topography, SEM imaging, and electrical measurements, it was shown that room temperature implanted devices can mimic the static performances of high temperature implanted MOSFETs and reduce lattice damage suffered during the fabrication process, when the dose of high energy implants are suppressed.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.0000,"publicationDate":"2024-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10416803","citationCount":"0","resultStr":"{\"title\":\"Investigation of Static Performances of 1.2kV 4H-SiC MOSFETs Fabricated Using All ‘Room Temperature’ Ion Implantations\",\"authors\":\"Stephen A. Mancini;Seung Yup Jang;Zeyu Chen;Dongyoung Kim;Alex Bialy;Balaji Raghotamacher;Michael Dudley;Nadeemullah Mahadik;Robert Stahlbush;Mowafak Al-Jassim;Woongje Sung\",\"doi\":\"10.1109/JEDS.2024.3359974\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Several different designs of 1.2kV-rated 4H-SiC MOSFETs have been successfully fabricated under various ion implantation conditions. Implantation conditions consisted of different P+ profiles and implantation temperatures of both room temperature (25°C) and elevated temperatures (600°C) in order to monitor subsequent lattice damage. Through the use of X-Ray topography, SEM imaging, and electrical measurements, it was shown that room temperature implanted devices can mimic the static performances of high temperature implanted MOSFETs and reduce lattice damage suffered during the fabrication process, when the dose of high energy implants are suppressed.\",\"PeriodicalId\":13210,\"journal\":{\"name\":\"IEEE Journal of the Electron Devices Society\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.0000,\"publicationDate\":\"2024-01-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10416803\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of the Electron Devices Society\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10416803/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10416803/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Investigation of Static Performances of 1.2kV 4H-SiC MOSFETs Fabricated Using All ‘Room Temperature’ Ion Implantations
Several different designs of 1.2kV-rated 4H-SiC MOSFETs have been successfully fabricated under various ion implantation conditions. Implantation conditions consisted of different P+ profiles and implantation temperatures of both room temperature (25°C) and elevated temperatures (600°C) in order to monitor subsequent lattice damage. Through the use of X-Ray topography, SEM imaging, and electrical measurements, it was shown that room temperature implanted devices can mimic the static performances of high temperature implanted MOSFETs and reduce lattice damage suffered during the fabrication process, when the dose of high energy implants are suppressed.
期刊介绍：
The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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