{"title":"用于 14/16 纳米技术节点 SoC 的低压和高压 FinFET 的小信号和大信号射频特性分析与建模","authors":"Anirban Kar;Shivendra Singh Parihar;Jun Z. Huang;Huilong Zhang;Weike Wang;Kimihiko Imura;Yogesh Singh Chauhan","doi":"10.1109/JEDS.2024.3384008","DOIUrl":null,"url":null,"abstract":"Modern System-on-Chip (SoC) architectures necessitate low-voltage (LV) core transistors featuring excellent digital, analog, and radio frequency (RF) properties, as well as thick oxide transistors serving as robust I/O buffers and high-voltage (HV) transistors essential for efficient power management. This study presents a comprehensive DC to RF characterization, a detailed modeling strategy, and subsequent model parameter extraction for commercially produced LV and HV Fin Field Effect Transistors (FinFETs) at 14/16 nm technology. The industry-standard BSIM-CMG compact model is modified to accurately capture the characteristics of the HV FinFET devices integrated with the digital LV FinFETs for SoC applications. A detailed analysis of the DC, analog, and RF performance of LV, I/O, and HV FinFETs compared to the contemporary planar CMOS technology is performed. The large-signal performance of the device is evaluated using the developed model and validated with the measured data. Finally, a concise overview of the performance indicators associated with the modeled device is also presented.","PeriodicalId":2,"journal":{"name":"ACS Applied Bio Materials","volume":null,"pages":null},"PeriodicalIF":4.6000,"publicationDate":"2024-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488034","citationCount":"0","resultStr":"{\"title\":\"Small-Signal and Large-Signal RF Characterization and Modeling of Low and High Voltage FinFETs for 14/16 nm Technology Node SoCs\",\"authors\":\"Anirban Kar;Shivendra Singh Parihar;Jun Z. Huang;Huilong Zhang;Weike Wang;Kimihiko Imura;Yogesh Singh Chauhan\",\"doi\":\"10.1109/JEDS.2024.3384008\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Modern System-on-Chip (SoC) architectures necessitate low-voltage (LV) core transistors featuring excellent digital, analog, and radio frequency (RF) properties, as well as thick oxide transistors serving as robust I/O buffers and high-voltage (HV) transistors essential for efficient power management. This study presents a comprehensive DC to RF characterization, a detailed modeling strategy, and subsequent model parameter extraction for commercially produced LV and HV Fin Field Effect Transistors (FinFETs) at 14/16 nm technology. The industry-standard BSIM-CMG compact model is modified to accurately capture the characteristics of the HV FinFET devices integrated with the digital LV FinFETs for SoC applications. A detailed analysis of the DC, analog, and RF performance of LV, I/O, and HV FinFETs compared to the contemporary planar CMOS technology is performed. The large-signal performance of the device is evaluated using the developed model and validated with the measured data. Finally, a concise overview of the performance indicators associated with the modeled device is also presented.\",\"PeriodicalId\":2,\"journal\":{\"name\":\"ACS Applied Bio Materials\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":4.6000,\"publicationDate\":\"2024-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10488034\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ACS Applied Bio Materials\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10488034/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"MATERIALS SCIENCE, BIOMATERIALS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACS Applied Bio Materials","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10488034/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"MATERIALS SCIENCE, BIOMATERIALS","Score":null,"Total":0}
Small-Signal and Large-Signal RF Characterization and Modeling of Low and High Voltage FinFETs for 14/16 nm Technology Node SoCs
Modern System-on-Chip (SoC) architectures necessitate low-voltage (LV) core transistors featuring excellent digital, analog, and radio frequency (RF) properties, as well as thick oxide transistors serving as robust I/O buffers and high-voltage (HV) transistors essential for efficient power management. This study presents a comprehensive DC to RF characterization, a detailed modeling strategy, and subsequent model parameter extraction for commercially produced LV and HV Fin Field Effect Transistors (FinFETs) at 14/16 nm technology. The industry-standard BSIM-CMG compact model is modified to accurately capture the characteristics of the HV FinFET devices integrated with the digital LV FinFETs for SoC applications. A detailed analysis of the DC, analog, and RF performance of LV, I/O, and HV FinFETs compared to the contemporary planar CMOS technology is performed. The large-signal performance of the device is evaluated using the developed model and validated with the measured data. Finally, a concise overview of the performance indicators associated with the modeled device is also presented.