带动态电流镜前端的 23.9μW 13.6 位基于周期调制的电容数字转换器

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2024-03-28 DOI:10.1109/LSSC.2024.3382813
Hyeyeon Lee;Donguk Seo;Young-Jin Woo;Yoonmyung Lee;Inhee Lee;Youngcheol Chae
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引用次数: 0

摘要

本文提出了一种低功耗高精度电容数字转换器(CDC),利用动态电流镜(DCM)将传感器输入电容 $(C_{\mathrm{ IN}}) $ 转换为输出电流。由此产生的电流与 $C_{\mathrm{ IN}}$ 与内部参考电容 $(C_{\mathrm {REF}})$的比率成正比,随后转换为周期调制输出,便于数字计数器进行简单的数字化。CDC 实现了 1 至 68 pF 的广泛 $C_{\mathrm{ IN}}$ 范围,而无需耗电的基准缓冲器。原型集成电路采用 65 纳米 CMOS 工艺制造,占地面积小,仅为 0.05 平方毫米,即使在 $C_{mathrm{ IN}}$ 为 47 pF 的情况下,功耗也仅为 $23.9~\mu \text{W}$。当 $C_{\mathrm{ IN}}$ 为 1 pF 时,它的电容分辨率为 1.65 fF,转换时间为 4 ms,有效位数为 13.6 位。
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A 23.9-μW 13.6-Bit Period Modulation-Based Capacitance-to-Digital Converter With Dynamic Current Mirror Front-End
This letter proposes a low-power high-precision capacitance-to-digital converter (CDC) utilizing a dynamic current mirror (DCM) to transform a sensor input capacitance $(C_{\mathrm{ IN}})$ into an output current. The resulting current is directly proportional to the ratio of $C_{\mathrm{ IN}}$ to an internal reference capacitor $(C_{\mathrm {REF}})$ and subsequently converted into a period-modulated output, facilitating simple digitization by a digital counter. The CDC achieves an extensive $C_{\mathrm{ IN}}$ range of 1 to 68 pF without the need for a power-hungry reference buffer. Fabricated in a 65-nm CMOS process, the prototype IC occupies a small area of 0.05-mm2 and consumes only $23.9~\mu \text{W}$ even with a $C_{\mathrm{ IN}}$ of 47 pF. It achieves a capacitance resolution of 1.65 fF for a $C_{\mathrm{ IN}}$ of 1 pF with a conversion time of 4 ms, corresponding to a 13.6-bit effective number of bit.
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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