{"title":"带动态电流镜前端的 23.9μW 13.6 位基于周期调制的电容数字转换器","authors":"Hyeyeon Lee;Donguk Seo;Young-Jin Woo;Yoonmyung Lee;Inhee Lee;Youngcheol Chae","doi":"10.1109/LSSC.2024.3382813","DOIUrl":null,"url":null,"abstract":"This letter proposes a low-power high-precision capacitance-to-digital converter (CDC) utilizing a dynamic current mirror (DCM) to transform a sensor input capacitance \n<inline-formula> <tex-math>$(C_{\\mathrm{ IN}})$ </tex-math></inline-formula>\n into an output current. The resulting current is directly proportional to the ratio of \n<inline-formula> <tex-math>$C_{\\mathrm{ IN}}$ </tex-math></inline-formula>\n to an internal reference capacitor \n<inline-formula> <tex-math>$(C_{\\mathrm {REF}})$ </tex-math></inline-formula>\n and subsequently converted into a period-modulated output, facilitating simple digitization by a digital counter. The CDC achieves an extensive \n<inline-formula> <tex-math>$C_{\\mathrm{ IN}}$ </tex-math></inline-formula>\n range of 1 to 68 pF without the need for a power-hungry reference buffer. Fabricated in a 65-nm CMOS process, the prototype IC occupies a small area of 0.05-mm2 and consumes only \n<inline-formula> <tex-math>$23.9~\\mu \\text{W}$ </tex-math></inline-formula>\n even with a \n<inline-formula> <tex-math>$C_{\\mathrm{ IN}}$ </tex-math></inline-formula>\n of 47 pF. It achieves a capacitance resolution of 1.65 fF for a \n<inline-formula> <tex-math>$C_{\\mathrm{ IN}}$ </tex-math></inline-formula>\n of 1 pF with a conversion time of 4 ms, corresponding to a 13.6-bit effective number of bit.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"7 ","pages":"135-138"},"PeriodicalIF":2.2000,"publicationDate":"2024-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 23.9-μW 13.6-Bit Period Modulation-Based Capacitance-to-Digital Converter With Dynamic Current Mirror Front-End\",\"authors\":\"Hyeyeon Lee;Donguk Seo;Young-Jin Woo;Yoonmyung Lee;Inhee Lee;Youngcheol Chae\",\"doi\":\"10.1109/LSSC.2024.3382813\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter proposes a low-power high-precision capacitance-to-digital converter (CDC) utilizing a dynamic current mirror (DCM) to transform a sensor input capacitance \\n<inline-formula> <tex-math>$(C_{\\\\mathrm{ IN}})$ </tex-math></inline-formula>\\n into an output current. The resulting current is directly proportional to the ratio of \\n<inline-formula> <tex-math>$C_{\\\\mathrm{ IN}}$ </tex-math></inline-formula>\\n to an internal reference capacitor \\n<inline-formula> <tex-math>$(C_{\\\\mathrm {REF}})$ </tex-math></inline-formula>\\n and subsequently converted into a period-modulated output, facilitating simple digitization by a digital counter. The CDC achieves an extensive \\n<inline-formula> <tex-math>$C_{\\\\mathrm{ IN}}$ </tex-math></inline-formula>\\n range of 1 to 68 pF without the need for a power-hungry reference buffer. Fabricated in a 65-nm CMOS process, the prototype IC occupies a small area of 0.05-mm2 and consumes only \\n<inline-formula> <tex-math>$23.9~\\\\mu \\\\text{W}$ </tex-math></inline-formula>\\n even with a \\n<inline-formula> <tex-math>$C_{\\\\mathrm{ IN}}$ </tex-math></inline-formula>\\n of 47 pF. It achieves a capacitance resolution of 1.65 fF for a \\n<inline-formula> <tex-math>$C_{\\\\mathrm{ IN}}$ </tex-math></inline-formula>\\n of 1 pF with a conversion time of 4 ms, corresponding to a 13.6-bit effective number of bit.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"7 \",\"pages\":\"135-138\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-03-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10485001/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10485001/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
A 23.9-μW 13.6-Bit Period Modulation-Based Capacitance-to-Digital Converter With Dynamic Current Mirror Front-End
This letter proposes a low-power high-precision capacitance-to-digital converter (CDC) utilizing a dynamic current mirror (DCM) to transform a sensor input capacitance
$(C_{\mathrm{ IN}})$
into an output current. The resulting current is directly proportional to the ratio of
$C_{\mathrm{ IN}}$
to an internal reference capacitor
$(C_{\mathrm {REF}})$
and subsequently converted into a period-modulated output, facilitating simple digitization by a digital counter. The CDC achieves an extensive
$C_{\mathrm{ IN}}$
range of 1 to 68 pF without the need for a power-hungry reference buffer. Fabricated in a 65-nm CMOS process, the prototype IC occupies a small area of 0.05-mm2 and consumes only
$23.9~\mu \text{W}$
even with a
$C_{\mathrm{ IN}}$
of 47 pF. It achieves a capacitance resolution of 1.65 fF for a
$C_{\mathrm{ IN}}$
of 1 pF with a conversion time of 4 ms, corresponding to a 13.6-bit effective number of bit.