45 纳米 CMOS SOI 中具有 21.2 dBm OP1dB 和 27.6% PAE1dB 的 Ka 波段抗互耦叠加场效应晶体管功率放大器

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2024-04-10 DOI:10.1109/LSSC.2024.3386676
Jian Zhang;Dawei Wang;Wei Zhu;Ming Zhai;Xiangjie Yi;Yan Wang
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引用次数: 0

摘要

这封信介绍了一种采用 45 纳米 CMOS 硅绝缘体的 Ka 波段相互耦合弹性叠层场效应晶体管功率放大器(PA)。通过一个正交混合耦合器将两个采用三层叠加场效应晶体管以提高输出功率(Pout)的子功率放大器组合在一起,从而在相控阵天线之间相互耦合的情况下保持稳健的高性能。为解决晶体管寄生电容导致的性能下降问题,引入了并联电感器,并采用磁耦合消除拓扑结构,以实现更紧凑的布局。测量结果表明,拟议的功率放大器实现了 21.2 dBm OP1dB 和 27.6% PAE1dB,以及 22.2 dBm Psat 和 28.8% 峰值 PAE。在 25 至 32 GHz 频率范围内,OP1dB 和 PAE1dB 分别超过 21 dBm 和 22%。最大小信号增益为 26.5 dB,S11/S22 <-19/-14 dB。在强电压驻波比条件下,Psat/OP1dB 的模拟变化小于 0.5/1.1 dBm。
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A Ka-Band Mutual Coupling Resilient Stacked-FET Power Amplifier With 21.2 dBm OP1dB and 27.6% PAE1dB in 45-nm CMOS SOI
This letter presents a Ka-band mutual coupling resilient stacked-FET power amplifier (PA) in 45-nm CMOS silicon on insulator. Two sub-PAs with triple-stacked-FET to increase output-power (Pout) are combined through a quadrature hybrid coupler to keep robust and high performance in the scenario of mutual coupling among the phased-array antennas. A shunt inductor is introduced to deal with the performance deterioration caused by the transistors’ parasitic capacitances and the magnetic coupling cancelling topology is adopted for a more compact layout. The measurement results show that the proposed PA achieves 21.2 dBm OP1dB with 27.6% PAE1dB and 22.2 dBm Psat with 28.8% peak PAE. The OP1dB and PAE1dB are beyond 21 dBm and 22% for a frequency range from 25 to 32 GHz, respectively. The maximum small-signal gain is 26.5 dB with <-19/-14 dB S11/S22. The simulated variation of Psat/OP1dB is less than 0.5/1.1 dBm under a strong voltage-standing-wave-ratio condition.
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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