Top-Gate Stack Engineering Featuring a High-κ Gadolinium Aluminate Interfacial Layer for Field-Effect Transistors Based on Two-Dimensional Transition-Metal Dichalcogenides

Atomic layer deposition (ALD) of gate dielectrics on two-dimensional transition-metal dichalcogenides (2D TMDs) is challenging due to their chemically inert surfaces. Although various surface pretreatments can form nucleation sites to facilitate the precursor adsorption, preserving 2D TMDs during the pretreatments and maintaining gate stack quality with the weak 2D TMD/dielectric interface become the main concerns. In this work, we combine physisorbed-precursor-assisted (PPA)-ALD to minimize damage to 2D TMDs with a second interfacial layer for performance enhancement. Ultrathin GdAlO₃ interlayers are integrated into 2D TMD gate stacks with PPA-ALD AlO_x seeding layers and HfO₂ top dielectrics. Further, 1-nm-thick and pinhole-free GdAlO₃ can be deposited on AlO_x-seeded monolayer (1L) WS₂ by ALD at 250 °C. The material properties of 1L WS₂ are preserved, as confirmed by Raman spectroscopy. After the GdAlO₃ layer insertion, 1L MoS₂ dual-gate (DG) field-effect transistors (FETs) show improved subthreshold swing (SS), field-effect mobility, and I_d–V_g hysteresis without compromising the capacitance-equivalent thickness (CET). The proposed strategy is wafer-scale compatible and extendable to the future nanosheet gate-all-around structures.