Frequency-adaptive DLIA–PLL-based current harmonic compensation for single-phase grid-interfaced inverters

The growing focus on clean energy is driving the extensive usage of grid-connected inverters (GCIs) and nonlinear loads. The adoption of these nonlinear components causes disturbances, such as harmonic injection, frequency variation, and DC offset, which reduce the power quality of the grid. This reduced power quality induces unstable operation and deterioration of sensitive equipment. The organizations of electrical engineers have defined some standards such as IEEE 519 and P1547 to maintain the power quality of GCIs by setting the limits for harmonics, phases, and frequency variations. Harmonic elimination with grid synchronization methods is used for GCIs to meet the standards. However, the performance of these methods degrades for distorted grid conditions such as DC offset and harmonics. To rectify the mentioned issues, this study proposes a harmonic compensation method using a frequency-adaptive digital lock-in amplifier-based phase-locked loop (DLIA–PLL). The aim is to provide accurate harmonic detection and elimination by performing frequency and phase tracking for grid synchronization. Simulation and experimental results for a 5 kW inverter in an environment with high-total harmonic distortion (THD) conditions are presented to validate the performance of the proposed harmonic compensation with DLIA–PLL. Yokogawa WT1600, a power analyzer, is used to provide reference THD.