Journal of Power Electronics最新文献

Power electronics switching devices played an important role in high-voltage DC circuit breaker development. Timely isolation of faulty portions of an HVDC transmission line from a healthy system is a basic requirement for a fault interruption. In this scenario, the integration of hybrid DC circuit breakers (HDCCBs) with wideband-gap semiconductor devices enables the effective management of high power, currents, and voltages. The SiC-MESFET and the GaN-HEMT are commonly used wideband-gap-based semiconductor devices. This paper introduces a fault interruption scheme for HVDC power systems, featuring the advancement of a hybrid DC circuit breaker. The proposed HDCCB design consists of two parts, one part is based on a VCB as a mechanical circuit breaker, and the second part involves electronic switches for fault interruption. The electronic switches are designed through the combination of GaN and HEMT to achieve fast switching to achieve rapid interruption of fault current. The system model is implemented through a Simulink model to perform a comparative analysis between the presented and existing protection topologies. Current commutation is achieved through the attainment of artificial zero current crossing to interrupt the DC fault. GaN-HEMT emerges as a more reliable and fast switching element compared to other electronic switches like Sic-MESFET as validated by the presented simulative results. The presented model shows better fault-clearing times of 2.2 ms and 2 ms for experimental parameters of (500 kV and 9kA) and (100 kV and 10kA), respectively. This fault-clearing time shows an improvement of 52.38% and 50% compared to the SiC-MESFET-based electronic switches used by the existing mechanisms. The outcomes of the proposed design are evaluated in terms of fault current, commutated current, and voltage across the commutated capacitor.

The DC bus voltage in single-phase converters inherently exhibits a second harmonic ripple. To accurately track the current reference value, notch filters are typically incorporated into the software control loop for suppression. However, traditional notch filters suffer from slow response times and significant oscillations. This paper presents an enhanced DC bus voltage extraction algorithm that estimates the second harmonic component in the DC bus voltage using system parameters and variables, without modifying the basic circuit structure or adding additional notch filters to the bus voltage control loop. By redesigning the voltage outer loop, the algorithm aims to reduce the overshoot and oscillations during voltage adjustments, improving the response speed. When integrated with a quasi-PR regulator-based current inner loop, this dual-loop control strategy effectively minimizes the overshoot and oscillations during voltage adjustments, enhances the response speed, and improves system stability. The effectiveness and validity of the proposed control strategy are demonstrated through MATLAB simulations and prototype experiments.

Insulated gate bipolar transistors (IGBTs) are widely used in grid-connected renewable energy generation. Junction temperature fluctuation is an important factor affecting the operating lifetime of IGBT modules. Many active thermal management methods for suppressing junction temperature fluctuation exist, but research on the implementation of thermal management in converters is limited. Junction temperature extraction is the basis of implementing thermal management. In this study, a thermal network model method and a temperature-sensitive electrical parameter (TSEP) method for junction temperature estimation are analyzed first. Aiming to limit the maximum junction temperature of IGBTs, a thermal management method is proposed by changing switching frequency. Then, for a three-phase two-level inverter, the effectiveness of the proposed thermal management method is analyzed by offline simulation based on the thermal network model method. Lastly, the IGBT junction temperature in the inverter is estimated online by using the TSEP method and the feasibility of the thermal management implementation method is verified on an experimental platform.

This study proposes a new type of quadratic high-gain boost converter to address the problems of high-voltage switching stress and poor dynamic response of the traditional quadratic high-gain boost converter. The proposed quadratic high-gain boost converter can be operated in inductive current continuous conduction mode and pseudo-continuous conduction mode according to different control modes. Results show that the voltage switching stress when the converter is operated in inductive current continuous conduction mode is reduced by 65% compared with the voltage switching stress when the traditional quadratic high-gain boost converter is used. The dynamic response speed when the converter is operated in pseudo-continuous conduction mode is improved by 35% compared with that when the traditional quadratic high-gain boost converter is used. Moreover, additional control freedom is obtained, thereby reducing the difficulty in the design of the compensator. Finally, the veracity of the proposed theory is verified by building an experimental prototype.

An improved semi-physical model for a SiC MOSFET incorporated with relevant physical effects and temperature characteristics is proposed based on the EKV model. A simulation analysis of the Junction Field Effect Transistor (JFET) effect, Drain Induced Barrier Lowering (DIBL) effect, channel length modulation effect, velocity saturation effect, and interface trap charge effect in SiC MOSFET devices is performed using Sentaurus TCAD. Based on the influence of physical effects on the characteristics of SiC MOSFET devices, mathematical corrections r(V_gs) and r(V_ds), which can describe the relevant physical effects, are introduced into the original EKV model. The capacitance is accurately modelled to achieve the required match between the transient characteristics of the devices. The accuracy of the model is verified by static tests and double-pulse experiments. Results show that the improved model can do a better job of simulating the actual operating conditions of the device. In addition, its accuracy and applicability are greatly improved, providing a semi-physical model with a wider range of applicability for the simulation of SiC MOSFETs in power electronic systems.

The reliability of rectifiers is regarded as one of the most important factors in traction systems. Unexpected faults occurring in sensors can degrade the performance and lead to secondary faults. Accordingly, a sensor fault diagnosis method is proposed in this paper. It can locate faults and identify fault types. Three high-incidence fault types in current and voltage sensors have been taken into consideration. Only the current residual is needed in the process of fault diagnosis. No additional sensors are required in this method. First, a traction rectifier model is developed. Then, a grid current estimator is constructed, the residual is acquired and applied to fault detection. Next, the residual is analyzed under different kinds of sensor faults. Fault diagnosis functions are constructed and the faults can be diagnosed. Finally, an experiment test is processed to demonstrate the effectiveness of the proposed method.

Dual active bridge (DAB) converters have two control variables when they work with dual phase shift (DPS) modulation. These control variables are the inner phase-shift ratio and the outer phase-shift ratio. They can be optimized to achieve minimum current stress during the operation of DAB converters. Conventional optimization methods cannot ensure soft-switching of the power semiconductor devices, which limits the efficiency and reliability of DAB converters. To balance the current stress and switching loss of DAB converters with DPS modulation, a novel optimal DPS strategy is proposed for DAB converters. The proposed strategy can ensure ZVS and avoid voltage spikes of the power semiconductor devices in DAB converters over the full load range. Meanwhile, it can achieve the minimum current stress under heavy loads and near-minimum current stress under middle and light loads for the components in DAB converters. The experimental results reveal that the proposed strategy achieves higher efficiency than conventional optimization methods under heavy and light loads. For middle loads, it is predicted that the proposed strategy can achieve higher efficiency when the switching loss is dominant. Moreover, the experimental results show that the voltage spikes of the MOSFETs are eliminated by the proposed strategy, which indicates a higher reliability than conventional strategies.

Bipolar dc distribution system is an attractive alternative to replace the conventional ac distribution system; however, it suffers from voltage and current unbalances. In parallel-connected triple-active-bridge (TAB) converters that form a bipolar dc distribution system, the current unbalance between each TAB module and the voltage unbalance between each load are the main issues that make controlling the system difficult. These unbalances occur due to the inevitable mismatch of gate signals and circuit parameters, despite having the same circuit components. A four-winding coupled inductor is proposed in this paper to handle these issues. The coupled inductor is formed by the magnetic integration of the inductors, which are present in TAB converters. Inductors in the same TAB module are directly coupled and the two directly coupled inductors are integrated again in the inverse direction. The proposed coupled inductor automatically balances the currents in each module and the voltages of each load under unbalanced conditions. Moreover, the proposed balancing scheme does not require additional control method or balancer circuit. The performance of the proposed coupled inductor was verified with a 10-kW prototype.

This paper proposes a rotating wireless power transfer system with dual-coupled LCC-LCC topology based on a self-decoupled rotary coupler for addressing the issues of wear and short lifespan associated with traditional electric brush slip rings. In comparison to the conventional single-coupled LCC-LCC topology, the proposed system results in a significant increase in output power and a more compact structure. First, the dual-coupled LCC-LCC topology circuit system is analyzed. A self-decoupled rotary coupler incorporating two pairs of coupled coils is proposed. Second, through the utilization of simulation software, the effects of coil dimension, turns, and magnetic shielding on the self-inductance and coupling coefficients are analyzed, optimizing the coupler for compactness and miniaturization. Third, an experimental setup is established to validate the self-decoupled performance and power enhancement capabilities of the designed coupler. Experimental results demonstrate that, under positive conditions, the proposed self-decoupled coupler achieves a system transmission power of 62.54 W, which is 240% higher than that of single-coupled systems, albeit with an 11.2% efficiency decrease. This system is suitable for rapid charging in rotary applications.

Nowadays, almost all electronic systems on printed circuit boards (PCB) adopt a vital element known as the power delivery network (PDN). However, the performance of the PDN is susceptible to variables such as the temperature and aging of its key constituents: the decoupling capacitors (decaps). Consequently, the long-term reliability of the PDN demands meticulous consideration to foresee how its performance can deviate from the initial design specifications. A realistic high-current server system is considered. It involves hundreds of decaps to achieve the required target impedance as optimally selected and laid out by the Power Integrity (PI) designer. The degradation of decap performance is analyzed by collecting experimental data from tens of decaps for each type used in the design while applying an accelerated aging process at different temperatures. The impact of aging in terms of the capacitance, parasitic inductance, and resistance of the decaps is considered to illustrate an innovative methodological design approach based on statistical analysis. Such a design approach can prevent the detrimental impact of a larger noise level due to the gradual performance degradation of the PDN over the intended life cycle of the system.