Machine-Learning-Based Mismatch Calibration for Time-Interleaved ADCs

The time-interleaved analog-to-digital conversion (TIADC) technique provides an effective way to achieve high sampling speed. However, a critical challenge in TIADC design arises from the presence of mismatches among parallel sub-analog-to-digital converters (ADCs), which detrimentally affect system performance. In this article, we propose a machine-learning-based method to address these mismatches across a broadband of input signal frequencies. Different from conventional approaches, this method avoids complex and specific matrix operations and reduces the compensation filter order required to achieve a given reconstruction accuracy. To assess the efficacy of our proposed method, we designed a 5-Gs/s 12-bit TIADC system. Through extensive testing, the results demonstrate notable improvements in the effective number of bits (ENOBs) following real-time calibration. Specifically, for input frequencies below 500 MHz, the ENOB surpasses 9 bits, while for frequencies ranging from 500 MHz to 1.25 GHz, it exceeds 8 bits.