{"title":"用于 FPGA 实现的基于 DSP 的高速低功耗 TRNG","authors":"Fabio Frustaci;Fanny Spagnolo;Pasquale Corsonello;Stefania Perri","doi":"10.1109/TCSII.2024.3421323","DOIUrl":null,"url":null,"abstract":"This brief presents an effective way to design high-throughput and low-power True Random Number Generators (TRNGs) for Field Programmable Gate Array (FPGA)-based digital systems. The proposed design makes an unconventional usage of the Digital Signal Processing (DSP) slice embedded within the AMD-Xilinx FPGA devices to implement high jitter ring oscillators as entropy sources for efficient TRNG designs. Thanks to its wide bit-width output, several configurations can be enabled to group multiple oscillators within a single DSP slice. As a result, a TRNG designed through the proposed scheme outputs up to 4 random bits per clock cycle, thus leading to a considerably high-throughput, while exploiting an ultra-compact architecture. When implemented on the AMD-Xilinx Zynq XC7Z020 System on Chip (SoC), the new architecture achieves a throughput of \n<inline-formula> <tex-math>$800\\times 10{^{{6}}}$ </tex-math></inline-formula>\n bit/sec and an energy consumption of only 22 pJ/bit. When compared to state-of-the-art competitors it achieves a throughput rate up to \n<inline-formula> <tex-math>$2.6\\times $ </tex-math></inline-formula>\n higher and an energy consumption up to \n<inline-formula> <tex-math>$8\\times $ </tex-math></inline-formula>\n lower. The new TRNG has been validated by means of the NIST SP 800-22, the NIST 800 90B and the AIS statistical tests.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"71 12","pages":"4964-4968"},"PeriodicalIF":4.0000,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10578016","citationCount":"0","resultStr":"{\"title\":\"A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations\",\"authors\":\"Fabio Frustaci;Fanny Spagnolo;Pasquale Corsonello;Stefania Perri\",\"doi\":\"10.1109/TCSII.2024.3421323\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This brief presents an effective way to design high-throughput and low-power True Random Number Generators (TRNGs) for Field Programmable Gate Array (FPGA)-based digital systems. The proposed design makes an unconventional usage of the Digital Signal Processing (DSP) slice embedded within the AMD-Xilinx FPGA devices to implement high jitter ring oscillators as entropy sources for efficient TRNG designs. Thanks to its wide bit-width output, several configurations can be enabled to group multiple oscillators within a single DSP slice. As a result, a TRNG designed through the proposed scheme outputs up to 4 random bits per clock cycle, thus leading to a considerably high-throughput, while exploiting an ultra-compact architecture. When implemented on the AMD-Xilinx Zynq XC7Z020 System on Chip (SoC), the new architecture achieves a throughput of \\n<inline-formula> <tex-math>$800\\\\times 10{^{{6}}}$ </tex-math></inline-formula>\\n bit/sec and an energy consumption of only 22 pJ/bit. When compared to state-of-the-art competitors it achieves a throughput rate up to \\n<inline-formula> <tex-math>$2.6\\\\times $ </tex-math></inline-formula>\\n higher and an energy consumption up to \\n<inline-formula> <tex-math>$8\\\\times $ </tex-math></inline-formula>\\n lower. The new TRNG has been validated by means of the NIST SP 800-22, the NIST 800 90B and the AIS statistical tests.\",\"PeriodicalId\":13101,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"volume\":\"71 12\",\"pages\":\"4964-4968\"},\"PeriodicalIF\":4.0000,\"publicationDate\":\"2024-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10578016\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10578016/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10578016/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A High-Speed and Low-Power DSP-Based TRNG for FPGA Implementations
This brief presents an effective way to design high-throughput and low-power True Random Number Generators (TRNGs) for Field Programmable Gate Array (FPGA)-based digital systems. The proposed design makes an unconventional usage of the Digital Signal Processing (DSP) slice embedded within the AMD-Xilinx FPGA devices to implement high jitter ring oscillators as entropy sources for efficient TRNG designs. Thanks to its wide bit-width output, several configurations can be enabled to group multiple oscillators within a single DSP slice. As a result, a TRNG designed through the proposed scheme outputs up to 4 random bits per clock cycle, thus leading to a considerably high-throughput, while exploiting an ultra-compact architecture. When implemented on the AMD-Xilinx Zynq XC7Z020 System on Chip (SoC), the new architecture achieves a throughput of
$800\times 10{^{{6}}}$
bit/sec and an energy consumption of only 22 pJ/bit. When compared to state-of-the-art competitors it achieves a throughput rate up to
$2.6\times $
higher and an energy consumption up to
$8\times $
lower. The new TRNG has been validated by means of the NIST SP 800-22, the NIST 800 90B and the AIS statistical tests.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.