A μ-GA Oriented ANN-Driven: Parameter Extraction of 5G CMOS Power Amplifier

This article introduces a novel method for extracting crucial parameters from a fifth-generation (5G) CMOS power amplifier (PA) operating at 24 GHz. The proposed method, micro-genetic algorithm artificial neural network ( $\mu $ -GAANN), presents an innovative synergy between $\mu $ -GA and ANN, enabling the accurate determination of crucial PA (circuit components) parameters. The $\mu $ -GAANN model has a fixed and robust stimulation function ( ${F} {_{\text {SF}}}$ and ${R} {_{\text {SF}}}$ ). ANNs are trained to approximate the parameter extraction process based on input-output data generated from the $\mu $ -GA. The proposed $\mu $ -GA incorporates the arithmetic crossover and nonuniform mutation; thus, several parameters of the ANN network are tweaked. Moreover, ANN parameters are enhanced by using $\mu $ -GA to achieve an optimal PA design in a shorter period of time. To verify the proposed $\mu $ -GAANN, we have also compared the training time with particle swarm optimization (PSO) employed in ANN, i.e., PSOANN. Besides, a derivative superposition (DS) linearization technique is used in the PA circuit, along with input load splits (I-LSs) to solve the low input impedance problem of conventional DS. To design a PA, the proposed $\mu $ -GAANN outperforms the traditional feedforward artificial neural networks (TFFANN). Using $\mu $ -GAANN, the PA’s simulated S21 is 25 dB, while the measured S21 is 21.2 dB. With traditional TFFANN, we observe a simulated gain of 24.1 dB for the PA. We achieved a simulated gain of 23.2 dB of the PA without using ANNs. The measured results of the $P {_{\text {sat}}}$ and PAE of the PA with $\mu $ -GAANN are 9.8 dBm and 32.1%, respectively. Also, a measured PA achieves a high third-order-input-intercept point (IIP3) of 14.1 dBm. The core chip area of the PA is 0.35 mm2.