{"title":"采用 3D 玻璃基先进封装技术的叠层式 2D 和 3D 结构紧凑型低损耗双工器","authors":"","doi":"10.1016/j.aeue.2024.155425","DOIUrl":null,"url":null,"abstract":"<div><p>A compact low loss wideband diplexer is introduced by using stacked 2D and 3D structures through 3D advanced packaging and through glass vias (TGV). An inductor is designed by using stacked 2D and 3D structures to reduce the coupling effect between adjacent 2D inductors located in the same layer. It can greatly improve the Q factor yet minimize the chip size. This low loss, small size diplexer is developed by virtue of a modified topology and the proposed stacked 2D and 3D structures. The designed diplexer with a compact size of 1.6 mm × 0.8 mm × 0.25 mm is fabricated using 3D glass-based advanced packaging technology and measured by on-wafer probing. The measured results indicate that it achieves an insertion loss less than 0.8 dB and 0.9 dB and an isolation better than 20 dB and 17.5 dB in the bands of 0.699 GHz-0.960 GHz and 1.71 GHz-2.69 GHz, respectively. In comparison with the previously reported designs, the proposed diplexer shows the superior advantages of smaller size and lower insertion loss.</p></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":null,"pages":null},"PeriodicalIF":3.0000,"publicationDate":"2024-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Compact low-loss diplexer with stacked 2D and 3D structures using 3D glass-based advanced packaging technology\",\"authors\":\"\",\"doi\":\"10.1016/j.aeue.2024.155425\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>A compact low loss wideband diplexer is introduced by using stacked 2D and 3D structures through 3D advanced packaging and through glass vias (TGV). An inductor is designed by using stacked 2D and 3D structures to reduce the coupling effect between adjacent 2D inductors located in the same layer. It can greatly improve the Q factor yet minimize the chip size. This low loss, small size diplexer is developed by virtue of a modified topology and the proposed stacked 2D and 3D structures. The designed diplexer with a compact size of 1.6 mm × 0.8 mm × 0.25 mm is fabricated using 3D glass-based advanced packaging technology and measured by on-wafer probing. The measured results indicate that it achieves an insertion loss less than 0.8 dB and 0.9 dB and an isolation better than 20 dB and 17.5 dB in the bands of 0.699 GHz-0.960 GHz and 1.71 GHz-2.69 GHz, respectively. In comparison with the previously reported designs, the proposed diplexer shows the superior advantages of smaller size and lower insertion loss.</p></div>\",\"PeriodicalId\":50844,\"journal\":{\"name\":\"Aeu-International Journal of Electronics and Communications\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":3.0000,\"publicationDate\":\"2024-07-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Aeu-International Journal of Electronics and Communications\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S143484112400311X\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Aeu-International Journal of Electronics and Communications","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S143484112400311X","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
通过三维高级封装和玻璃通孔 (TGV),采用堆叠式二维和三维结构,推出了一种紧凑型低损耗宽带双工器。电感器的设计采用了堆叠式 2D 和 3D 结构,以减少位于同一层的相邻 2D 电感器之间的耦合效应。它可以大大提高 Q 因子,同时最大限度地减小芯片尺寸。这种低损耗、小尺寸的双工器是通过改进的拓扑结构和建议的堆叠二维和三维结构开发出来的。所设计的双工器尺寸为 1.6 mm × 0.8 mm × 0.25 mm,采用三维玻璃基先进封装技术制造,并通过晶圆探测进行了测量。测量结果表明,它在 0.699 GHz-0.960 GHz 和 1.71 GHz-2.69 GHz 频段的插入损耗分别小于 0.8 dB 和 0.9 dB,隔离度分别优于 20 dB 和 17.5 dB。与之前报道的设计相比,所提出的双工器具有尺寸更小、插入损耗更低的优越性。
Compact low-loss diplexer with stacked 2D and 3D structures using 3D glass-based advanced packaging technology
A compact low loss wideband diplexer is introduced by using stacked 2D and 3D structures through 3D advanced packaging and through glass vias (TGV). An inductor is designed by using stacked 2D and 3D structures to reduce the coupling effect between adjacent 2D inductors located in the same layer. It can greatly improve the Q factor yet minimize the chip size. This low loss, small size diplexer is developed by virtue of a modified topology and the proposed stacked 2D and 3D structures. The designed diplexer with a compact size of 1.6 mm × 0.8 mm × 0.25 mm is fabricated using 3D glass-based advanced packaging technology and measured by on-wafer probing. The measured results indicate that it achieves an insertion loss less than 0.8 dB and 0.9 dB and an isolation better than 20 dB and 17.5 dB in the bands of 0.699 GHz-0.960 GHz and 1.71 GHz-2.69 GHz, respectively. In comparison with the previously reported designs, the proposed diplexer shows the superior advantages of smaller size and lower insertion loss.
期刊介绍:
AEÜ is an international scientific journal which publishes both original works and invited tutorials. The journal''s scope covers all aspects of theory and design of circuits, systems and devices for electronics, signal processing, and communication, including:
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