利用刷新脉冲提高基于衰减晶闸管桥的多层神经网络的性能

Aalvee Asad Kausani, Caiwen Ding, Mehdi Anwar
{"title":"利用刷新脉冲提高基于衰减晶闸管桥的多层神经网络的性能","authors":"Aalvee Asad Kausani, Caiwen Ding, Mehdi Anwar","doi":"10.1142/s0129156424400561","DOIUrl":null,"url":null,"abstract":"Memristors as non-volatile memory devices have been recognized for executing in-memory computation in neuromorphic hardware. In this paper, a multilayer neural network has been developed with memristor-bridges as electrical synapses and trained with modified-chip-in-the-loop technique for an image classification task. Modeling the ideal conduction behavior of memristors by their device-physics inspired analytical model has yielded satisfactory performance. However, repeated voltage cycling degrades the resistance window of memristors by aggregating conductive residuals in filamentary memristors. Therefore, emulation of such nonideality has demonstrated compromised results. To improve the performance, refresh pulses have been introduced to the devices in between write pulses to eradicate the fundamental reason of the degradation — i.e., the residuals. It has been observed that improvement of performance is contingent upon the refreshment frequency, and frequent refreshment has the ability to restore performance to a level closely approaching its ideal emulation.","PeriodicalId":35778,"journal":{"name":"International Journal of High Speed Electronics and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2024-07-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance Improvement of Degrading Memristor-Bridge-Based Multilayer Neural Network with Refresh Pulses\",\"authors\":\"Aalvee Asad Kausani, Caiwen Ding, Mehdi Anwar\",\"doi\":\"10.1142/s0129156424400561\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Memristors as non-volatile memory devices have been recognized for executing in-memory computation in neuromorphic hardware. In this paper, a multilayer neural network has been developed with memristor-bridges as electrical synapses and trained with modified-chip-in-the-loop technique for an image classification task. Modeling the ideal conduction behavior of memristors by their device-physics inspired analytical model has yielded satisfactory performance. However, repeated voltage cycling degrades the resistance window of memristors by aggregating conductive residuals in filamentary memristors. Therefore, emulation of such nonideality has demonstrated compromised results. To improve the performance, refresh pulses have been introduced to the devices in between write pulses to eradicate the fundamental reason of the degradation — i.e., the residuals. It has been observed that improvement of performance is contingent upon the refreshment frequency, and frequent refreshment has the ability to restore performance to a level closely approaching its ideal emulation.\",\"PeriodicalId\":35778,\"journal\":{\"name\":\"International Journal of High Speed Electronics and Systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-07-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Journal of High Speed Electronics and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1142/s0129156424400561\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of High Speed Electronics and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1142/s0129156424400561","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0

摘要

忆阻器作为一种非易失性存储器件,已被认为可以在神经形态硬件中执行内存计算。本文利用忆阻器桥作为电突触,开发了一种多层神经网络,并采用改进的芯片在环技术对其进行训练,以完成图像分类任务。通过受器件物理学启发的分析模型来模拟忆阻器的理想传导行为,取得了令人满意的效果。然而,反复的电压循环会在丝状忆阻器中聚集导电残留物,从而降低忆阻器的电阻窗口。因此,对这种非理想性的模拟结果大打折扣。为了提高性能,我们在写入脉冲之间向器件引入了刷新脉冲,以消除性能下降的根本原因--残留物。据观察,性能的提高取决于刷新频率,频繁刷新能够将性能恢复到接近理想仿真的水平。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Performance Improvement of Degrading Memristor-Bridge-Based Multilayer Neural Network with Refresh Pulses
Memristors as non-volatile memory devices have been recognized for executing in-memory computation in neuromorphic hardware. In this paper, a multilayer neural network has been developed with memristor-bridges as electrical synapses and trained with modified-chip-in-the-loop technique for an image classification task. Modeling the ideal conduction behavior of memristors by their device-physics inspired analytical model has yielded satisfactory performance. However, repeated voltage cycling degrades the resistance window of memristors by aggregating conductive residuals in filamentary memristors. Therefore, emulation of such nonideality has demonstrated compromised results. To improve the performance, refresh pulses have been introduced to the devices in between write pulses to eradicate the fundamental reason of the degradation — i.e., the residuals. It has been observed that improvement of performance is contingent upon the refreshment frequency, and frequent refreshment has the ability to restore performance to a level closely approaching its ideal emulation.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
International Journal of High Speed Electronics and Systems
International Journal of High Speed Electronics and Systems Engineering-Electrical and Electronic Engineering
CiteScore
0.60
自引率
0.00%
发文量
22
期刊介绍: Launched in 1990, the International Journal of High Speed Electronics and Systems (IJHSES) has served graduate students and those in R&D, managerial and marketing positions by giving state-of-the-art data, and the latest research trends. Its main charter is to promote engineering education by advancing interdisciplinary science between electronics and systems and to explore high speed technology in photonics and electronics. IJHSES, a quarterly journal, continues to feature a broad coverage of topics relating to high speed or high performance devices, circuits and systems.
期刊最新文献
Electrical Equipment Knowledge Graph Embedding Using Language Model with Self-learned Prompts Evaluation of Dynamic and Static Balance Ability of Athletes Based on Computer Vision Technology Analysis of Joint Injury Prevention in Basketball Overload Training Based on Adjustable Embedded Systems A Comprehensive Study and Comparison of 2-Bit 7T–10T SRAM Configurations with 4-State CMOS-SWS Inverters Complete Ensemble Empirical Mode Decomposition with Adaptive Noise to Extract Deep Information of Bearing Fault in Steam Turbines via Deep Belief Network
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1