Yan-Kui Liang;Wei-Li Li;Yu-Lon Lin;Dong-Ru Hsieh;Tsung-Ying Yang;Tsung-Te Chou;Chi-Chung Kei;Huai-Ying Huang;Yu-Ming Lin;Yuan-Chieh Tseng;Tien-Sheng Chao;Edward Yi Chang;Kasidit Toprasertpong;Shinichi Takagi;Chun-Hsiung Lin
{"title":"具有 TiO$_{\\text{2}}$ 表面层的 BEOL 兼容型高比例超薄 InZnO 沟道铁电薄膜晶体管稳定性的提高","authors":"Yan-Kui Liang;Wei-Li Li;Yu-Lon Lin;Dong-Ru Hsieh;Tsung-Ying Yang;Tsung-Te Chou;Chi-Chung Kei;Huai-Ying Huang;Yu-Ming Lin;Yuan-Chieh Tseng;Tien-Sheng Chao;Edward Yi Chang;Kasidit Toprasertpong;Shinichi Takagi;Chun-Hsiung Lin","doi":"10.1109/TED.2024.3433835","DOIUrl":null,"url":null,"abstract":"In this study, we investigated the impact of inserting an interfacial layer (IL) between the InZnO channel and ZrO2/HfO2 superlattice (SL) ferroelectric (FE) gate-stack on the performance and stability of highly scaled FE thin-film transistors (FeTFTs). FeTFTs with various channel lengths (50–750 nm) were characterized to reveal the impact of two IL (i.e., TiO2 and Al2O3) on device characteristics. All the memory window (MW) contours of FeTFTs with a pulsewidth of 1 ms–100 ns and an amplitude of 2.5–5 V have been investigated. The FeTFT with TiO2 IL demonstrated impressive stability in MW (\n<inline-formula> <tex-math>$\\boldsymbol {\\Delta } $ </tex-math></inline-formula>\n MW/MW\n<inline-formula> <tex-math>$_{{1}\\text {st cy}\\text {cle}}~\\boldsymbol {\\le } ~3.6$ </tex-math></inline-formula>\n%) up to 108 cycles for a program/erase voltage of \n<inline-formula> <tex-math>$\\boldsymbol {\\pm }3$ </tex-math></inline-formula>\n V and pulsewidth of \n<inline-formula> <tex-math>$1~\\boldsymbol {\\mu } $ </tex-math></inline-formula>\n s. It was suggested that the FeTFT with a higher dielectric constant \n<inline-formula> <tex-math>$(k)$ </tex-math></inline-formula>\n TiO2 IL may reduce the electrical field and depolarization field at the interface between the channel and gate dielectric, as well as improve interfacial quality, thereby enhancing the reliability of FeTFTs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":null,"pages":null},"PeriodicalIF":2.9000,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Improved Stability of BEOL-Compatible Highly Scaled Ultrathin InZnO Channel Ferroelectric Thin-Film Transistor With TiO₂ Interfacial Layer\",\"authors\":\"Yan-Kui Liang;Wei-Li Li;Yu-Lon Lin;Dong-Ru Hsieh;Tsung-Ying Yang;Tsung-Te Chou;Chi-Chung Kei;Huai-Ying Huang;Yu-Ming Lin;Yuan-Chieh Tseng;Tien-Sheng Chao;Edward Yi Chang;Kasidit Toprasertpong;Shinichi Takagi;Chun-Hsiung Lin\",\"doi\":\"10.1109/TED.2024.3433835\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, we investigated the impact of inserting an interfacial layer (IL) between the InZnO channel and ZrO2/HfO2 superlattice (SL) ferroelectric (FE) gate-stack on the performance and stability of highly scaled FE thin-film transistors (FeTFTs). FeTFTs with various channel lengths (50–750 nm) were characterized to reveal the impact of two IL (i.e., TiO2 and Al2O3) on device characteristics. All the memory window (MW) contours of FeTFTs with a pulsewidth of 1 ms–100 ns and an amplitude of 2.5–5 V have been investigated. The FeTFT with TiO2 IL demonstrated impressive stability in MW (\\n<inline-formula> <tex-math>$\\\\boldsymbol {\\\\Delta } $ </tex-math></inline-formula>\\n MW/MW\\n<inline-formula> <tex-math>$_{{1}\\\\text {st cy}\\\\text {cle}}~\\\\boldsymbol {\\\\le } ~3.6$ </tex-math></inline-formula>\\n%) up to 108 cycles for a program/erase voltage of \\n<inline-formula> <tex-math>$\\\\boldsymbol {\\\\pm }3$ </tex-math></inline-formula>\\n V and pulsewidth of \\n<inline-formula> <tex-math>$1~\\\\boldsymbol {\\\\mu } $ </tex-math></inline-formula>\\n s. It was suggested that the FeTFT with a higher dielectric constant \\n<inline-formula> <tex-math>$(k)$ </tex-math></inline-formula>\\n TiO2 IL may reduce the electrical field and depolarization field at the interface between the channel and gate dielectric, as well as improve interfacial quality, thereby enhancing the reliability of FeTFTs.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2024-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10620072/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10620072/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Improved Stability of BEOL-Compatible Highly Scaled Ultrathin InZnO Channel Ferroelectric Thin-Film Transistor With TiO₂ Interfacial Layer
In this study, we investigated the impact of inserting an interfacial layer (IL) between the InZnO channel and ZrO2/HfO2 superlattice (SL) ferroelectric (FE) gate-stack on the performance and stability of highly scaled FE thin-film transistors (FeTFTs). FeTFTs with various channel lengths (50–750 nm) were characterized to reveal the impact of two IL (i.e., TiO2 and Al2O3) on device characteristics. All the memory window (MW) contours of FeTFTs with a pulsewidth of 1 ms–100 ns and an amplitude of 2.5–5 V have been investigated. The FeTFT with TiO2 IL demonstrated impressive stability in MW (
$\boldsymbol {\Delta } $
MW/MW
$_{{1}\text {st cy}\text {cle}}~\boldsymbol {\le } ~3.6$
%) up to 108 cycles for a program/erase voltage of
$\boldsymbol {\pm }3$
V and pulsewidth of
$1~\boldsymbol {\mu } $
s. It was suggested that the FeTFT with a higher dielectric constant
$(k)$
TiO2 IL may reduce the electrical field and depolarization field at the interface between the channel and gate dielectric, as well as improve interfacial quality, thereby enhancing the reliability of FeTFTs.
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.