{"title":"基于铁电电荷捕获层的 Ge n 沟道混合存储器具有低工作电压、大存储窗口和可忽略的读取延迟","authors":"Yi-Fan Chen;Kai-Yang Huang;Chun-Yi Kuo;Yung-Hsien Wu","doi":"10.1109/LED.2024.3437186","DOIUrl":null,"url":null,"abstract":"Ge n-channel hybrid memory based on GeO\n<sub>2</sub>\n/Al\n<sub>2</sub>\nO\n<sub>3</sub>\n tunnel oxide and HfZrO\n<sub>x</sub>\n (HZO) ferroelectric charge trapping layer without block oxide was proposed. The hybrid memory shows promising performance in terms of a large memory window of 2.2 V by applying 5 V/-3 V for \n<inline-formula> <tex-math>$1~\\mu $ </tex-math></inline-formula>\ns, long retention up to 10 years, and robust endurance up to \n<inline-formula> <tex-math>$10^{{7}}$ </tex-math></inline-formula>\n cycles with negligible read latency. It outstands flash memory in terms of higher speed/lower operating voltage due to the ferroelectricity enhanced electric-field across the tunnel oxide while assisting retention of the trapped electrons by dipoles without using block oxide. It also has the competitive advantage over FeFET memory in terms of greatly improved read latency. Besides the integrated merits, the hybrid memory realizes multi-level cell (MLC) and synaptic behaviors such as excitatory/inhibitory postsynaptic currents (EPSC/IPSC), making it eligible in memory-driven neuromorphic computing.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"45 10","pages":"1784-1787"},"PeriodicalIF":4.5000,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10620262","citationCount":"0","resultStr":"{\"title\":\"Ge n-Channel Hybrid Memory Based on Ferroelectric Charge Trapping Layer With Low Operating Voltage, Large Memory Window, and Negligible Read Latency\",\"authors\":\"Yi-Fan Chen;Kai-Yang Huang;Chun-Yi Kuo;Yung-Hsien Wu\",\"doi\":\"10.1109/LED.2024.3437186\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ge n-channel hybrid memory based on GeO\\n<sub>2</sub>\\n/Al\\n<sub>2</sub>\\nO\\n<sub>3</sub>\\n tunnel oxide and HfZrO\\n<sub>x</sub>\\n (HZO) ferroelectric charge trapping layer without block oxide was proposed. The hybrid memory shows promising performance in terms of a large memory window of 2.2 V by applying 5 V/-3 V for \\n<inline-formula> <tex-math>$1~\\\\mu $ </tex-math></inline-formula>\\ns, long retention up to 10 years, and robust endurance up to \\n<inline-formula> <tex-math>$10^{{7}}$ </tex-math></inline-formula>\\n cycles with negligible read latency. It outstands flash memory in terms of higher speed/lower operating voltage due to the ferroelectricity enhanced electric-field across the tunnel oxide while assisting retention of the trapped electrons by dipoles without using block oxide. It also has the competitive advantage over FeFET memory in terms of greatly improved read latency. Besides the integrated merits, the hybrid memory realizes multi-level cell (MLC) and synaptic behaviors such as excitatory/inhibitory postsynaptic currents (EPSC/IPSC), making it eligible in memory-driven neuromorphic computing.\",\"PeriodicalId\":13198,\"journal\":{\"name\":\"IEEE Electron Device Letters\",\"volume\":\"45 10\",\"pages\":\"1784-1787\"},\"PeriodicalIF\":4.5000,\"publicationDate\":\"2024-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10620262\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Electron Device Letters\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10620262/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10620262/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
提出了基于 GeO2/Al2O3 隧道氧化物和 HfZrOx(HZO)铁电荷捕获层(无块状氧化物)的 Ge n 沟道混合存储器。该混合存储器在以下方面表现出良好的性能:通过在1~mu $ s内施加5 V/-3 V电压,可获得2.2 V的大内存窗口;可保持长达10年的时间;在读取延迟可忽略不计的情况下,具有高达10^{{7}}$周期的耐用性。由于铁电性增强了隧道氧化物上的电场,同时在不使用块状氧化物的情况下通过偶极子帮助保留被困电子,因此它在更高的速度/更低的工作电压方面优于闪存。与 FeFET 存储器相比,它还具有读取延迟大大改善的竞争优势。除了综合优势外,混合存储器还实现了多级单元(MLC)和突触行为(如兴奋/抑制突触后电流(EPSC/IPSC)),使其适用于存储器驱动的神经形态计算。
Ge n-Channel Hybrid Memory Based on Ferroelectric Charge Trapping Layer With Low Operating Voltage, Large Memory Window, and Negligible Read Latency
Ge n-channel hybrid memory based on GeO
2
/Al
2
O
3
tunnel oxide and HfZrO
x
(HZO) ferroelectric charge trapping layer without block oxide was proposed. The hybrid memory shows promising performance in terms of a large memory window of 2.2 V by applying 5 V/-3 V for
$1~\mu $
s, long retention up to 10 years, and robust endurance up to
$10^{{7}}$
cycles with negligible read latency. It outstands flash memory in terms of higher speed/lower operating voltage due to the ferroelectricity enhanced electric-field across the tunnel oxide while assisting retention of the trapped electrons by dipoles without using block oxide. It also has the competitive advantage over FeFET memory in terms of greatly improved read latency. Besides the integrated merits, the hybrid memory realizes multi-level cell (MLC) and synaptic behaviors such as excitatory/inhibitory postsynaptic currents (EPSC/IPSC), making it eligible in memory-driven neuromorphic computing.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.