A 20-V Pulse Driver Based on All-nMOS Charge Pump Without Reversion Loss and Overstress in 65-nm Standard CMOS Technology

This article proposes a high-efficiency all-nMOS bidirectional charge pump (CP) cell and constructs a CP-based high-voltage (HV) pulse driver based on it. Double-diode substrate isolation (DDSI) can extend the maximum supported voltage in a bulk CMOS process, but it requires an all-nMOS implementation of CP cells. Existing all-nMOS CPs either do not support the bidirectional charge transfer required for HV pulse drivers, or achieve it with additional penalties such as reversion charge loss and overstress on transistors. The proposed all-nMOS CP with novel gate voltage control strategies is the first one reported in the literature that can support the bidirectional charge transfer required for HV pulse drivers without suffering from reversion loss and threshold voltage loss or causing overstress on transistors. A ten-stage CP-based HV pulse driver is implemented in a 65-nm CMOS process utilizing this cell. Postlayout simulation results demonstrate that it can reliably generate 20-V HV pulses from a 2.5 V supply for a 15 pF // 200 k $\Omega $ load at 55 kHz. The driver exhibits a peak power efficiency of 46.4% and occupies an area of 0.262 mm2.