Sumit Choudhary;Daniel Schwarz;Hannes S. Funk;Satinder K. Sharma;Jörg Schulze
{"title":"用于无结 GeSn$_{text{-on-}}$Si FinFET 的低温加工 Ni/GeSn 最佳触点","authors":"Sumit Choudhary;Daniel Schwarz;Hannes S. Funk;Satinder K. Sharma;Jörg Schulze","doi":"10.1109/TED.2024.3430244","DOIUrl":null,"url":null,"abstract":"For junctionless FETs (JLFETs), an optimal ohmic contact is needed to achieve maximum drive current. The scaling of the source/drain (S/D) contact area impacts the contact resistivity (\n<inline-formula> <tex-math>$\\rho _{c}$ </tex-math></inline-formula>\n) of FETs, which limits their\n<sc>on</small>\n current and switching speed. Minimizing the S/D series resistance along with ohmic contacts is the critical factor in JLFET design due to moderate doping levels at S/D. The Ni and Ge contacts optimized at a low temperature of \n<inline-formula> <tex-math>$350~^{\\circ }$ </tex-math></inline-formula>\nC by forming gas annealing (FGA) process and the computed contact resistance (\n<inline-formula> <tex-math>${R}_{c}$ </tex-math></inline-formula>\n), sheet resistance (\n<inline-formula> <tex-math>${R}_{\\text {sh}}$ </tex-math></inline-formula>\n), and contact resistivity (\n<inline-formula> <tex-math>$\\rho _{c}$ </tex-math></inline-formula>\n) for Ni/p-GeSn contacts are \n<inline-formula> <tex-math>$2.04\\times 10^{-{3}}~\\Omega \\cdot \\text {cm}$ </tex-math></inline-formula>\n, \n<inline-formula> <tex-math>$63.96~\\Omega $ </tex-math></inline-formula>\n/□, and \n<inline-formula> <tex-math>$6.18\\times 10^{-{8}}~\\Omega \\cdot \\text {cm}^{{2}}$ </tex-math></inline-formula>\n, respectively. The impact of capping metal resistance (\n<inline-formula> <tex-math>${R}_{m}$ </tex-math></inline-formula>\n) is analytically examined for Ni/p-GeSn contacts using the modified circular transmission line model (cTLM). Furthermore, to study the metal cap resistance (\n<inline-formula> <tex-math>${R}_{m}$ </tex-math></inline-formula>\n) effect pragmatically, the optimized GeSn channel FinFET with width/length (W/L) 20/90 nm is analyzed by incorporating an extra metal cap at contacts and its electrical characteristics were compared with the control sample. The result demonstrate that the effect of metal resistance is very significant in low sheet resistance (\n<inline-formula> <tex-math>${R}_{\\text {sh}}$ </tex-math></inline-formula>\n) materials, where \n<inline-formula> <tex-math>${R}_{\\text {sh}}$ </tex-math></inline-formula>\n is close to \n<inline-formula> <tex-math>${R}_{m}$ </tex-math></inline-formula>\n.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":null,"pages":null},"PeriodicalIF":2.9000,"publicationDate":"2024-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Low-Temperature Processed Ni/GeSn Optimal Contacts for Junctionless GeSn-on-Si FinFETs\",\"authors\":\"Sumit Choudhary;Daniel Schwarz;Hannes S. Funk;Satinder K. Sharma;Jörg Schulze\",\"doi\":\"10.1109/TED.2024.3430244\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For junctionless FETs (JLFETs), an optimal ohmic contact is needed to achieve maximum drive current. The scaling of the source/drain (S/D) contact area impacts the contact resistivity (\\n<inline-formula> <tex-math>$\\\\rho _{c}$ </tex-math></inline-formula>\\n) of FETs, which limits their\\n<sc>on</small>\\n current and switching speed. Minimizing the S/D series resistance along with ohmic contacts is the critical factor in JLFET design due to moderate doping levels at S/D. The Ni and Ge contacts optimized at a low temperature of \\n<inline-formula> <tex-math>$350~^{\\\\circ }$ </tex-math></inline-formula>\\nC by forming gas annealing (FGA) process and the computed contact resistance (\\n<inline-formula> <tex-math>${R}_{c}$ </tex-math></inline-formula>\\n), sheet resistance (\\n<inline-formula> <tex-math>${R}_{\\\\text {sh}}$ </tex-math></inline-formula>\\n), and contact resistivity (\\n<inline-formula> <tex-math>$\\\\rho _{c}$ </tex-math></inline-formula>\\n) for Ni/p-GeSn contacts are \\n<inline-formula> <tex-math>$2.04\\\\times 10^{-{3}}~\\\\Omega \\\\cdot \\\\text {cm}$ </tex-math></inline-formula>\\n, \\n<inline-formula> <tex-math>$63.96~\\\\Omega $ </tex-math></inline-formula>\\n/□, and \\n<inline-formula> <tex-math>$6.18\\\\times 10^{-{8}}~\\\\Omega \\\\cdot \\\\text {cm}^{{2}}$ </tex-math></inline-formula>\\n, respectively. The impact of capping metal resistance (\\n<inline-formula> <tex-math>${R}_{m}$ </tex-math></inline-formula>\\n) is analytically examined for Ni/p-GeSn contacts using the modified circular transmission line model (cTLM). Furthermore, to study the metal cap resistance (\\n<inline-formula> <tex-math>${R}_{m}$ </tex-math></inline-formula>\\n) effect pragmatically, the optimized GeSn channel FinFET with width/length (W/L) 20/90 nm is analyzed by incorporating an extra metal cap at contacts and its electrical characteristics were compared with the control sample. The result demonstrate that the effect of metal resistance is very significant in low sheet resistance (\\n<inline-formula> <tex-math>${R}_{\\\\text {sh}}$ </tex-math></inline-formula>\\n) materials, where \\n<inline-formula> <tex-math>${R}_{\\\\text {sh}}$ </tex-math></inline-formula>\\n is close to \\n<inline-formula> <tex-math>${R}_{m}$ </tex-math></inline-formula>\\n.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2024-08-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10632111/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10632111/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Low-Temperature Processed Ni/GeSn Optimal Contacts for Junctionless GeSn-on-Si FinFETs
For junctionless FETs (JLFETs), an optimal ohmic contact is needed to achieve maximum drive current. The scaling of the source/drain (S/D) contact area impacts the contact resistivity (
$\rho _{c}$
) of FETs, which limits their
on
current and switching speed. Minimizing the S/D series resistance along with ohmic contacts is the critical factor in JLFET design due to moderate doping levels at S/D. The Ni and Ge contacts optimized at a low temperature of
$350~^{\circ }$
C by forming gas annealing (FGA) process and the computed contact resistance (
${R}_{c}$
), sheet resistance (
${R}_{\text {sh}}$
), and contact resistivity (
$\rho _{c}$
) for Ni/p-GeSn contacts are
$2.04\times 10^{-{3}}~\Omega \cdot \text {cm}$
,
$63.96~\Omega $
/□, and
$6.18\times 10^{-{8}}~\Omega \cdot \text {cm}^{{2}}$
, respectively. The impact of capping metal resistance (
${R}_{m}$
) is analytically examined for Ni/p-GeSn contacts using the modified circular transmission line model (cTLM). Furthermore, to study the metal cap resistance (
${R}_{m}$
) effect pragmatically, the optimized GeSn channel FinFET with width/length (W/L) 20/90 nm is analyzed by incorporating an extra metal cap at contacts and its electrical characteristics were compared with the control sample. The result demonstrate that the effect of metal resistance is very significant in low sheet resistance (
${R}_{\text {sh}}$
) materials, where
${R}_{\text {sh}}$
is close to
${R}_{m}$
.
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.