利用时序未展开并行性实现高能效 SNN 加速

IF 5.6 2区 计算机科学 Q1 COMPUTER SCIENCE, THEORY & METHODS IEEE Transactions on Parallel and Distributed Systems Pub Date : 2024-06-18 DOI:10.1109/TPDS.2024.3415712
Fangxin Liu;Zongwu Wang;Wenbo Zhao;Ning Yang;Yongbiao Chen;Shiyuan Huang;Haomin Li;Tao Yang;Songwen Pei;Xiaoyao Liang;Li Jiang
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引用次数: 0

摘要

事件驱动尖峰神经网络(SNN)在实现高能耗和高面积效率方面具有巨大潜力。然而,现有的 SNN 加速器存在延迟和能耗高的问题,这是由于串行累加比较操作造成的。这主要是因为 SNN 神经元会整合尖峰、累积膜电位,并在电位超过阈值时产生输出尖峰。为了解决这个问题,一种方法是利用 SNN 尖峰的稀疏性来减少时间步数。然而,这种方法会导致神经元之间的工作量不平衡,并限制处理元件(PE)的利用率。在本文中,我们介绍了 SATO,这是一种时间并行的 SNN 加速器,可以并行累积所有时间步长的膜电位。SATO 采用两阶段流水线方法,有效地解耦了神经元计算。这不仅保持了准确性,还为细粒度并行提供了机会。通过将神经元计算划分为不同的阶段,SATO 可以利用现代硬件架构的并行处理能力,同时执行每个时间步的尖峰累积。这不仅提高了加速器的整体效率,还通过利用细粒度的并行性降低了延迟。SATO 的架构包括一个新颖的二进制加法器搜索树,用于生成输出尖峰列车,有效地解耦了累积比较操作中的时序依赖性。此外,SATO 还采用了一种基于桶排序的方法,将压缩工作负载均匀地分配给所有处理器,最大限度地提高了输入尖峰列车的数据局部性。各种 SNN 模型的实验结果表明,SATO 的性能优于著名的加速器--8 位版本的 "Eyeriss",平均提速 20.7 倍,节能 6.0 倍。与最先进的 SNN 加速器 "SpinalFlow "相比,SATO 还能实现平均 4.6 倍的性能提升和 3.1 倍的能耗降低,这对于推理来说是相当了不起的。
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Exploiting Temporal-Unrolled Parallelism for Energy-Efficient SNN Acceleration
Event-driven spiking neural networks (SNNs) have demonstrated significant potential for achieving high energy and area efficiency. However, existing SNN accelerators suffer from issues such as high latency and energy consumption due to serial accumulation-comparison operations. This is mainly because SNN neurons integrate spikes, accumulate membrane potential, and generate output spikes when the potential exceeds a threshold. To address this, one approach is to leverage the sparsity of SNN spikes to reduce the number of time steps. However, this method can result in imbalanced workloads among neurons and limit the utilization of processing elements (PEs). In this paper, we present SATO, a temporal-parallel SNN accelerator that enables parallel accumulation of membrane potential for all time steps. SATO adopts a two-stage pipeline methodology, effectively decoupling neuron computations. This not only maintains accuracy but also unveils opportunities for fine-grained parallelism. By dividing the neuron computation into distinct stages, SATO enables the concurrent execution of spike accumulation for each time step, leveraging the parallel processing capabilities of modern hardware architectures. This not only enhances the overall efficiency of the accelerator but also reduces latency by exploiting parallelism at a granular level. The architecture of SATO includes a novel binary adder-search tree for generating the output spike train, effectively decoupling the chronological dependence in the accumulation-comparison operation. Furthermore, SATO employs a bucket-sort-based method to evenly distribute compressed workloads to all PEs, maximizing data locality of input spike trains. Experimental results on various SNN models demonstrate that SATO outperforms the well-known accelerator, the 8-bit version of “Eyeriss” by $20.7\times$ in terms of speedup and $6.0\times$ energy-saving, on average. Compared to the state-of-the-art SNN accelerator “SpinalFlow”, SATO can also achieve $4.6\times$ performance gain and $3.1\times$ energy reduction on average, which is quite impressive for inference.
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来源期刊
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems 工程技术-工程:电子与电气
CiteScore
11.00
自引率
9.40%
发文量
281
审稿时长
5.6 months
期刊介绍: IEEE Transactions on Parallel and Distributed Systems (TPDS) is published monthly. It publishes a range of papers, comments on previously published papers, and survey articles that deal with the parallel and distributed systems research areas of current importance to our readers. Particular areas of interest include, but are not limited to: a) Parallel and distributed algorithms, focusing on topics such as: models of computation; numerical, combinatorial, and data-intensive parallel algorithms, scalability of algorithms and data structures for parallel and distributed systems, communication and synchronization protocols, network algorithms, scheduling, and load balancing. b) Applications of parallel and distributed computing, including computational and data-enabled science and engineering, big data applications, parallel crowd sourcing, large-scale social network analysis, management of big data, cloud and grid computing, scientific and biomedical applications, mobile computing, and cyber-physical systems. c) Parallel and distributed architectures, including architectures for instruction-level and thread-level parallelism; design, analysis, implementation, fault resilience and performance measurements of multiple-processor systems; multicore processors, heterogeneous many-core systems; petascale and exascale systems designs; novel big data architectures; special purpose architectures, including graphics processors, signal processors, network processors, media accelerators, and other special purpose processors and accelerators; impact of technology on architecture; network and interconnect architectures; parallel I/O and storage systems; architecture of the memory hierarchy; power-efficient and green computing architectures; dependable architectures; and performance modeling and evaluation. d) Parallel and distributed software, including parallel and multicore programming languages and compilers, runtime systems, operating systems, Internet computing and web services, resource management including green computing, middleware for grids, clouds, and data centers, libraries, performance modeling and evaluation, parallel programming paradigms, and programming environments and tools.
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