利用源极袋工程设计陡峭的亚阈值摆动双 - 栅极隧道场效应晶体管:设计指南

IF 2.7 Q2 PHYSICS, CONDENSED MATTER Micro and Nanostructures Pub Date : 2024-08-13 DOI:10.1016/j.micrna.2024.207951
Nisha Yadav , Sunil Jadav , Gaurav Saini
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引用次数: 0

摘要

在这项研究中,我们提出了一种前景看好的源极工程双栅极(DG)隧道场效应晶体管(TFET)器件,该器件能够以足够高的驱动电流提供极低值的亚阈值波动(SS)。利用 Sentaurus TCAD 仿真,我们证明了反掺杂水平口袋(口袋的掺杂与源极相反)放置在源极区域时,会在源极-口袋交界处引入内置带弯曲。这就降低了口袋区域的导带(CB)最小值,从而在口袋 CB 靠近源价带(VB)时减小了势垒宽度。因此,可以观察到更强的电场,从而降低阈值电压(带对带隧穿(BTBT)的开始),并随之降低阈下摆幅。为了提高导通电流并抑制伏极性,在源极一侧引入了高介电材料和低功耗栅极材料,在漏极一侧引入了低介电材料和高功耗栅极材料。与传统 TFET 中的点隧穿相比,拟议结构中的栅极重叠口袋增加了可用于 BTBT 的横截面积,从而导致载流子从源极到口袋的线隧穿,从而产生更高的导通电流。在这项工作中,我们讨论了源极工程在提高异质介质(HD)双金属双栅极(DMDG)TFET 性能中的作用。我们提供了实现更陡峭阈下摆动的设计指南,同时考虑了作为关键参数的口袋掺杂和口袋厚度。我们对传统的 DG-TFET 和 HD-DG-TFET 与所提出的栅极过袋 (GoP) HD-DMDG-TFET 结构进行了比较研究。与具有相同几何参数的传统 DG-TFET 相比,所提出的结构提供了 ∼33 倍的陡峭 SS、提高了两个数量级以上的导通电流、降低了两个数量级的安培极电流以及 133 倍的离子/关断性能,因此成为低功耗应用的最佳选择。
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Steep subthreshold swing Double - Gate tunnel FET using source pocket engineering: Design guidelines

In this work, we propose a promising source engineered Double - Gate (DG) Tunnel Field Effect Transistor (TFET) device capable of providing remarkably low value of Subthreshold Swing (SS) with sufficiently high drive current. Using Sentaurus TCAD simulations, we demonstrate that counter-doped horizontal pockets (doping of pocket is kept opposite to that of source) when placed in the source region introduces a built-in band bending at the source-pocket junction. This lowers the minima of Conduction Band (CB) in pocket region thereby reducing the barrier width as the pocket CB moves closer to source Valence Band (VB). As a result, stronger electric field is observed thereby reducing the threshold voltage (onset of band-to-band tunneling (BTBT)) and subsequent reduction in subthreshold swing. To boost the ON-current and suppress ambipolarity, high-k dielectric material along with low work-function gate material is introduced at source side and low-k gate dielectric along with high work-function gate material is introduced at drain side. Compared to point tunneling in conventional TFETs, the gate overlapped pockets in the proposed structure result in an increase in cross-section area available for BTBT thereby leading to line tunneling of carriers from the source to the pocket, resulting in higher ON-current. In this work, we discuss the role of source engineering in boosting the performance of Hetero-Dielectric (HD) Dual-Metal-Double-Gate (DMDG) TFET. We provide design guidelines to achieve steeper subthreshold swing while considering pocket doping and pocket thickness as the key parameters. A comparative study of conventional DG-TFET and HD-DG-TFET with the proposed Gate-over-Pockets (GoP) HD-DMDG-TFET structure is done. When compared to the conventional DG-TFET with same geometrical parameters, the proposed structure provides 33× steeper SS, more than two order improved ON-current, two order lower ambipolar current and 133 folds better Ion/Ioff thus becomes the perfect choice for low power applications.

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