Yi Zhang, Ruibin Gao, Shuang Liu, Yujie Han, Meng Ren, Hanhui Lin, Jingzhou Pang
{"title":"具有扩展高效率范围的对称耦合 Doherty 功率放大器的分析与设计","authors":"Yi Zhang, Ruibin Gao, Shuang Liu, Yujie Han, Meng Ren, Hanhui Lin, Jingzhou Pang","doi":"10.1016/j.aeue.2024.155509","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents a novel Doherty power amplifier (DPA) structure that employs two equal-cell transistors with an extended high-efficiency range. It is illustrated that the DPA high-efficiency range can be extended by employing a novel coupler-based network through introducing different impedance at the isolation port, which can improve the back-off range. The corresponding theoretical architecture of the proposed coupled DPA is constructed with design parameters. The load modulation effect with different circuit parameters are also analyzed, and DPA performance in different back-off range can be obtained. To validate the proposed architecture, a symmetrical coupled DPA with a high-efficiency range of around 9 dB is designed at 2 GHz. Under the continuous-wave(CW) signal, the fabricated DPA achieves saturated output power of 44.2 dBm and saturated drain efficiency (DE) of 65%. At 8.5 dB back-off, DE of 51.2% can be obtained with a gain of 14 dB. When driven by a 20 MHz Long Term Evolution (LTE) signal with 8 dB peak to average power ratio (PAPR), the measured adjacent channel power ratio (ACPR) keeps better than −20 dBc without linearization. The measurement results well conform to the theoretical analysis and simulation results.</p></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"187 ","pages":"Article 155509"},"PeriodicalIF":3.0000,"publicationDate":"2024-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analysis and design of symmetrical coupled Doherty power amplifier with extended high-efficiency range\",\"authors\":\"Yi Zhang, Ruibin Gao, Shuang Liu, Yujie Han, Meng Ren, Hanhui Lin, Jingzhou Pang\",\"doi\":\"10.1016/j.aeue.2024.155509\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper presents a novel Doherty power amplifier (DPA) structure that employs two equal-cell transistors with an extended high-efficiency range. It is illustrated that the DPA high-efficiency range can be extended by employing a novel coupler-based network through introducing different impedance at the isolation port, which can improve the back-off range. The corresponding theoretical architecture of the proposed coupled DPA is constructed with design parameters. The load modulation effect with different circuit parameters are also analyzed, and DPA performance in different back-off range can be obtained. To validate the proposed architecture, a symmetrical coupled DPA with a high-efficiency range of around 9 dB is designed at 2 GHz. Under the continuous-wave(CW) signal, the fabricated DPA achieves saturated output power of 44.2 dBm and saturated drain efficiency (DE) of 65%. At 8.5 dB back-off, DE of 51.2% can be obtained with a gain of 14 dB. When driven by a 20 MHz Long Term Evolution (LTE) signal with 8 dB peak to average power ratio (PAPR), the measured adjacent channel power ratio (ACPR) keeps better than −20 dBc without linearization. The measurement results well conform to the theoretical analysis and simulation results.</p></div>\",\"PeriodicalId\":50844,\"journal\":{\"name\":\"Aeu-International Journal of Electronics and Communications\",\"volume\":\"187 \",\"pages\":\"Article 155509\"},\"PeriodicalIF\":3.0000,\"publicationDate\":\"2024-09-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Aeu-International Journal of Electronics and Communications\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1434841124003959\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Aeu-International Journal of Electronics and Communications","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1434841124003959","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Analysis and design of symmetrical coupled Doherty power amplifier with extended high-efficiency range
This paper presents a novel Doherty power amplifier (DPA) structure that employs two equal-cell transistors with an extended high-efficiency range. It is illustrated that the DPA high-efficiency range can be extended by employing a novel coupler-based network through introducing different impedance at the isolation port, which can improve the back-off range. The corresponding theoretical architecture of the proposed coupled DPA is constructed with design parameters. The load modulation effect with different circuit parameters are also analyzed, and DPA performance in different back-off range can be obtained. To validate the proposed architecture, a symmetrical coupled DPA with a high-efficiency range of around 9 dB is designed at 2 GHz. Under the continuous-wave(CW) signal, the fabricated DPA achieves saturated output power of 44.2 dBm and saturated drain efficiency (DE) of 65%. At 8.5 dB back-off, DE of 51.2% can be obtained with a gain of 14 dB. When driven by a 20 MHz Long Term Evolution (LTE) signal with 8 dB peak to average power ratio (PAPR), the measured adjacent channel power ratio (ACPR) keeps better than −20 dBc without linearization. The measurement results well conform to the theoretical analysis and simulation results.
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