具有扩展高效率范围的对称耦合 Doherty 功率放大器的分析与设计

IF 3 3区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Aeu-International Journal of Electronics and Communications Pub Date : 2024-09-05 DOI:10.1016/j.aeue.2024.155509
Yi Zhang, Ruibin Gao, Shuang Liu, Yujie Han, Meng Ren, Hanhui Lin, Jingzhou Pang
{"title":"具有扩展高效率范围的对称耦合 Doherty 功率放大器的分析与设计","authors":"Yi Zhang,&nbsp;Ruibin Gao,&nbsp;Shuang Liu,&nbsp;Yujie Han,&nbsp;Meng Ren,&nbsp;Hanhui Lin,&nbsp;Jingzhou Pang","doi":"10.1016/j.aeue.2024.155509","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents a novel Doherty power amplifier (DPA) structure that employs two equal-cell transistors with an extended high-efficiency range. It is illustrated that the DPA high-efficiency range can be extended by employing a novel coupler-based network through introducing different impedance at the isolation port, which can improve the back-off range. The corresponding theoretical architecture of the proposed coupled DPA is constructed with design parameters. The load modulation effect with different circuit parameters are also analyzed, and DPA performance in different back-off range can be obtained. To validate the proposed architecture, a symmetrical coupled DPA with a high-efficiency range of around 9 dB is designed at 2 GHz. Under the continuous-wave(CW) signal, the fabricated DPA achieves saturated output power of 44.2 dBm and saturated drain efficiency (DE) of 65%. At 8.5 dB back-off, DE of 51.2% can be obtained with a gain of 14 dB. When driven by a 20 MHz Long Term Evolution (LTE) signal with 8 dB peak to average power ratio (PAPR), the measured adjacent channel power ratio (ACPR) keeps better than −20 dBc without linearization. The measurement results well conform to the theoretical analysis and simulation results.</p></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"187 ","pages":"Article 155509"},"PeriodicalIF":3.0000,"publicationDate":"2024-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analysis and design of symmetrical coupled Doherty power amplifier with extended high-efficiency range\",\"authors\":\"Yi Zhang,&nbsp;Ruibin Gao,&nbsp;Shuang Liu,&nbsp;Yujie Han,&nbsp;Meng Ren,&nbsp;Hanhui Lin,&nbsp;Jingzhou Pang\",\"doi\":\"10.1016/j.aeue.2024.155509\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper presents a novel Doherty power amplifier (DPA) structure that employs two equal-cell transistors with an extended high-efficiency range. It is illustrated that the DPA high-efficiency range can be extended by employing a novel coupler-based network through introducing different impedance at the isolation port, which can improve the back-off range. The corresponding theoretical architecture of the proposed coupled DPA is constructed with design parameters. The load modulation effect with different circuit parameters are also analyzed, and DPA performance in different back-off range can be obtained. To validate the proposed architecture, a symmetrical coupled DPA with a high-efficiency range of around 9 dB is designed at 2 GHz. Under the continuous-wave(CW) signal, the fabricated DPA achieves saturated output power of 44.2 dBm and saturated drain efficiency (DE) of 65%. At 8.5 dB back-off, DE of 51.2% can be obtained with a gain of 14 dB. When driven by a 20 MHz Long Term Evolution (LTE) signal with 8 dB peak to average power ratio (PAPR), the measured adjacent channel power ratio (ACPR) keeps better than −20 dBc without linearization. The measurement results well conform to the theoretical analysis and simulation results.</p></div>\",\"PeriodicalId\":50844,\"journal\":{\"name\":\"Aeu-International Journal of Electronics and Communications\",\"volume\":\"187 \",\"pages\":\"Article 155509\"},\"PeriodicalIF\":3.0000,\"publicationDate\":\"2024-09-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Aeu-International Journal of Electronics and Communications\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1434841124003959\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Aeu-International Journal of Electronics and Communications","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1434841124003959","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

本文介绍了一种新型多尔蒂功率放大器(DPA)结构,它采用两个等效单元晶体管,具有更宽的高效率范围。它说明了通过在隔离端口引入不同的阻抗,采用基于耦合器的新型网络可以扩展 DPA 的高效率范围,从而改善背离范围。利用设计参数构建了拟议耦合 DPA 的相应理论结构。此外,还分析了不同电路参数下的负载调制效应,并获得了不同背离范围内的 DPA 性能。为了验证所提出的结构,设计了一个对称耦合 DPA,其在 2 GHz 频率下的效率范围约为 9 dB。在连续波(CW)信号下,所制造的 DPA 实现了 44.2 dBm 的饱和输出功率和 65% 的饱和漏极效率(DE)。在 8.5 dB 偏置下,增益为 14 dB 时的漏极效率为 51.2%。当由峰值与平均功率比(PAPR)为 8 dB 的 20 MHz 长期演进(LTE)信号驱动时,在不进行线性化的情况下,测得的邻道功率比(ACPR)保持在优于 -20 dBc 的水平。测量结果与理论分析和仿真结果完全吻合。
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Analysis and design of symmetrical coupled Doherty power amplifier with extended high-efficiency range

This paper presents a novel Doherty power amplifier (DPA) structure that employs two equal-cell transistors with an extended high-efficiency range. It is illustrated that the DPA high-efficiency range can be extended by employing a novel coupler-based network through introducing different impedance at the isolation port, which can improve the back-off range. The corresponding theoretical architecture of the proposed coupled DPA is constructed with design parameters. The load modulation effect with different circuit parameters are also analyzed, and DPA performance in different back-off range can be obtained. To validate the proposed architecture, a symmetrical coupled DPA with a high-efficiency range of around 9 dB is designed at 2 GHz. Under the continuous-wave(CW) signal, the fabricated DPA achieves saturated output power of 44.2 dBm and saturated drain efficiency (DE) of 65%. At 8.5 dB back-off, DE of 51.2% can be obtained with a gain of 14 dB. When driven by a 20 MHz Long Term Evolution (LTE) signal with 8 dB peak to average power ratio (PAPR), the measured adjacent channel power ratio (ACPR) keeps better than −20 dBc without linearization. The measurement results well conform to the theoretical analysis and simulation results.

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来源期刊
CiteScore
6.90
自引率
18.80%
发文量
292
审稿时长
4.9 months
期刊介绍: AEÜ is an international scientific journal which publishes both original works and invited tutorials. The journal''s scope covers all aspects of theory and design of circuits, systems and devices for electronics, signal processing, and communication, including: signal and system theory, digital signal processing network theory and circuit design information theory, communication theory and techniques, modulation, source and channel coding switching theory and techniques, communication protocols optical communications microwave theory and techniques, radar, sonar antennas, wave propagation AEÜ publishes full papers and letters with very short turn around time but a high standard review process. Review cycles are typically finished within twelve weeks by application of modern electronic communication facilities.
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