VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis

Optimizing multiple competitive black-box objectives with tight constraints poses a common challenge in analog circuit design. Multiobjective Bayesian optimization (MOBO) is a sample-efficient approach to identify the optimal tradeoffs, namely, the Pareto front (PF). However, existing MOBO methods exhibit limitations in handling high-dimensional design space, large sample budgets, many objectives and tight constraints. This article introduces VTSMOC, a sample-efficient and computationally lightweight approach for addressing high-dimensional constrained multiobjective optimization problems. VTSMOC decomposes the design space into Voronoi cells, dynamically constructing a hierarchical Voronoi tree through clustering observations with dominance relationships. Promising leaf nodes in the Voronoi tree are pinpointed by traversing the tree with gradient bandit. The diversity of PF is ensured by parallel sampling within different promising cells, selected using a diffusive strategy. We also propose the expected PF improvement (EPFI) and probability of PF improvement (PPFI) acquisition functions to facilitate the PF efficiently along the radial direction of PF surface. Compared to state-of-the-art methods, VTSMOC achieves significant improvements in both sample and computational efficiency.