{"title":"用于 180 nm CMOS 连续时间应用的 0.5 V 0.02% THD 块状驱动 OTA","authors":"Yangxin Xiang;Huajun Yao;Minghao Jiang;Junkun Chen;Yongzhen Chen;Jiangfeng Wu","doi":"10.1109/TCSI.2024.3443452","DOIUrl":null,"url":null,"abstract":"This paper introduces a 0.5-V, two-stage, pseudo-differential bulk-driven operational transconductance amplifier with high gain and linearity for low-power continuous-time applications. The input stage’s common-mode feedback utilizes a linear resistor detector with a conductance reduction cross-coupled pair to mitigate the loading effect of the common-mode detector resistor at ultra-low power operations. Temperature dependence of the conductance reduction circuit is compensated. The impact of the conductance reduction circuit on linearity performance is explored. The output stage employs a class-AB topology and utilizes a phase lead compensator to stabilize the OTA. Implemented in 180 nm CMOS technology, this OTA achieves a DC gain and slew rate of 68 dB and 26.1 V/\n<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>\n s, respectively, under a capacitive load of 10 pF. The total power consumption is \n<inline-formula> <tex-math>$34.2~\\mu $ </tex-math></inline-formula>\n W. With unit gain feedback configuration, the measured total harmonic distortion is only 0.02% at an output amplitude of 500 mVpp. Test results validate the proposed circuit, positioning it competitively compared to state-of-the-art designs.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.2000,"publicationDate":"2024-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 0.5-V 0.02% THD Bulk-Driven OTA for Continuous-Time Applications in 180 nm CMOS\",\"authors\":\"Yangxin Xiang;Huajun Yao;Minghao Jiang;Junkun Chen;Yongzhen Chen;Jiangfeng Wu\",\"doi\":\"10.1109/TCSI.2024.3443452\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a 0.5-V, two-stage, pseudo-differential bulk-driven operational transconductance amplifier with high gain and linearity for low-power continuous-time applications. The input stage’s common-mode feedback utilizes a linear resistor detector with a conductance reduction cross-coupled pair to mitigate the loading effect of the common-mode detector resistor at ultra-low power operations. Temperature dependence of the conductance reduction circuit is compensated. The impact of the conductance reduction circuit on linearity performance is explored. The output stage employs a class-AB topology and utilizes a phase lead compensator to stabilize the OTA. Implemented in 180 nm CMOS technology, this OTA achieves a DC gain and slew rate of 68 dB and 26.1 V/\\n<inline-formula> <tex-math>$\\\\mu $ </tex-math></inline-formula>\\n s, respectively, under a capacitive load of 10 pF. The total power consumption is \\n<inline-formula> <tex-math>$34.2~\\\\mu $ </tex-math></inline-formula>\\n W. With unit gain feedback configuration, the measured total harmonic distortion is only 0.02% at an output amplitude of 500 mVpp. Test results validate the proposed circuit, positioning it competitively compared to state-of-the-art designs.\",\"PeriodicalId\":13039,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":5.2000,\"publicationDate\":\"2024-08-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10643631/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems I: Regular Papers","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10643631/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
本文介绍了一种 0.5 V、两级、伪差分批量驱动运算跨导放大器,具有高增益和线性度,适用于低功耗连续时间应用。输入级的共模反馈采用线性电阻检测器和电导降低交叉耦合对,以减轻超低功耗工作时共模检测器电阻的负载效应。电导降低电路的温度依赖性得到了补偿。探讨了电导降低电路对线性性能的影响。输出级采用 AB 类拓扑结构,并利用相位导联补偿器来稳定 OTA。该 OTA 采用 180 nm CMOS 技术实现,在 10 pF 的电容负载下,直流增益和压摆率分别达到 68 dB 和 26.1 V/ $\mu$s。在单位增益反馈配置下,输出振幅为 500 mVpp 时,测得的总谐波失真仅为 0.02%。测试结果验证了所提出的电路,使其与最先进的设计相比更具竞争力。
A 0.5-V 0.02% THD Bulk-Driven OTA for Continuous-Time Applications in 180 nm CMOS
This paper introduces a 0.5-V, two-stage, pseudo-differential bulk-driven operational transconductance amplifier with high gain and linearity for low-power continuous-time applications. The input stage’s common-mode feedback utilizes a linear resistor detector with a conductance reduction cross-coupled pair to mitigate the loading effect of the common-mode detector resistor at ultra-low power operations. Temperature dependence of the conductance reduction circuit is compensated. The impact of the conductance reduction circuit on linearity performance is explored. The output stage employs a class-AB topology and utilizes a phase lead compensator to stabilize the OTA. Implemented in 180 nm CMOS technology, this OTA achieves a DC gain and slew rate of 68 dB and 26.1 V/
$\mu $
s, respectively, under a capacitive load of 10 pF. The total power consumption is
$34.2~\mu $
W. With unit gain feedback configuration, the measured total harmonic distortion is only 0.02% at an output amplitude of 500 mVpp. Test results validate the proposed circuit, positioning it competitively compared to state-of-the-art designs.
期刊介绍:
TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.