{"title":"低压 CMOS 无电容 LDO:块状驱动与栅极驱动比较研究","authors":"Óscar Pereira-Rial;Juan M. Carrillo;Paula López","doi":"10.1109/TCSI.2024.3440842","DOIUrl":null,"url":null,"abstract":"This paper explores the feasibility of a capacitor-less (CL) low-dropout (LDO) regulator to operate efficiently in a low-voltage environment. The CL-LDO scheme selected is based on a unity-gain feedback configuration around the error amplifier (EA), so that the inclusion of high-value on-chip resistors is avoided and different key parameters, such as the power supply rejection or the noise, are optimized. A comparative analysis has been carried out over the same LDO structure including a bulk-driven and a gate-driven EA, respectively. The pass branch of the voltage regulator is provided with pseudo-class-AB operation, in order to lead to a very small quiescent current in the standby operation mode, whereas a very large current can be delivered to the load when required. Both regulators were designed and fabricated in 180 nm CMOS technology to operate with a maximum supply voltage of 1.8 V. The extensive experimental characterization showed that the bulk-driven LDO can achieve a significantly lower minimum supply voltage, i.e., 0.6 V, as compared to the gate-driven counterpart, 1 V, under the same reference voltage and load current conditions.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.2000,"publicationDate":"2024-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10638180","citationCount":"0","resultStr":"{\"title\":\"Low-Voltage CMOS Capacitor-Less LDOs: Bulk-Driven Versus Gate-Driven Comparative Study\",\"authors\":\"Óscar Pereira-Rial;Juan M. Carrillo;Paula López\",\"doi\":\"10.1109/TCSI.2024.3440842\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper explores the feasibility of a capacitor-less (CL) low-dropout (LDO) regulator to operate efficiently in a low-voltage environment. The CL-LDO scheme selected is based on a unity-gain feedback configuration around the error amplifier (EA), so that the inclusion of high-value on-chip resistors is avoided and different key parameters, such as the power supply rejection or the noise, are optimized. A comparative analysis has been carried out over the same LDO structure including a bulk-driven and a gate-driven EA, respectively. The pass branch of the voltage regulator is provided with pseudo-class-AB operation, in order to lead to a very small quiescent current in the standby operation mode, whereas a very large current can be delivered to the load when required. Both regulators were designed and fabricated in 180 nm CMOS technology to operate with a maximum supply voltage of 1.8 V. The extensive experimental characterization showed that the bulk-driven LDO can achieve a significantly lower minimum supply voltage, i.e., 0.6 V, as compared to the gate-driven counterpart, 1 V, under the same reference voltage and load current conditions.\",\"PeriodicalId\":13039,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":5.2000,\"publicationDate\":\"2024-08-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10638180\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10638180/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems I: Regular Papers","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10638180/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
本文探讨了无电容(CL)低压差(LDO)稳压器在低压环境下高效运行的可行性。所选的 CL-LDO 方案基于误差放大器 (EA) 周围的单增益反馈配置,从而避免了加入高值片上电阻,并优化了不同的关键参数,如电源抑制或噪声。我们对相同的 LDO 结构进行了比较分析,其中分别包括散装驱动型和栅极驱动型 EA。稳压器的通路支路采用伪 AB 类工作方式,以便在待机工作模式下产生极小的静态电流,而在需要时可向负载提供极大的电流。广泛的实验表征表明,在相同的基准电压和负载电流条件下,与栅极驱动型 LDO 的 1 V 电压相比,散装驱动型 LDO 的最低电源电压要低得多,仅为 0.6 V。
Low-Voltage CMOS Capacitor-Less LDOs: Bulk-Driven Versus Gate-Driven Comparative Study
This paper explores the feasibility of a capacitor-less (CL) low-dropout (LDO) regulator to operate efficiently in a low-voltage environment. The CL-LDO scheme selected is based on a unity-gain feedback configuration around the error amplifier (EA), so that the inclusion of high-value on-chip resistors is avoided and different key parameters, such as the power supply rejection or the noise, are optimized. A comparative analysis has been carried out over the same LDO structure including a bulk-driven and a gate-driven EA, respectively. The pass branch of the voltage regulator is provided with pseudo-class-AB operation, in order to lead to a very small quiescent current in the standby operation mode, whereas a very large current can be delivered to the load when required. Both regulators were designed and fabricated in 180 nm CMOS technology to operate with a maximum supply voltage of 1.8 V. The extensive experimental characterization showed that the bulk-driven LDO can achieve a significantly lower minimum supply voltage, i.e., 0.6 V, as compared to the gate-driven counterpart, 1 V, under the same reference voltage and load current conditions.
期刊介绍:
TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.