{"title":"具有高电压增益的直接耦合氢化金刚石场效应晶体管逻辑电路","authors":"Yuesong Liang;Wei Wang;Fang Lin;Tianlin Niu;Genqiang Chen;Fei Wang;Qi Li;Shi He;Minghui Zhang;Yanfeng Wang;Feng Wen;Hong-Xing Wang","doi":"10.1109/LED.2024.3448363","DOIUrl":null,"url":null,"abstract":"The directly coupled hydrogen-terminated diamond FET logic (DCHDFL) circuit is fabricated. The E-mode and D-mode FETs are assigned as driver and load devices of the DCHDFL circuit to achieve inversion characteristics. The E-mode FET showcases high I\n<sub>DSmax</sub>\n of 53.3mA/mm, V\n<sub>TH</sub>\n of -0.8 V, low SS of 98 mV/dec and on/off ratio of 10\n<sup>9</sup>\n, which enable input/output logic level matching with a low drive/load ratio of 1.0. The peak gain of circuit increases from 12.57 to 36.3 V/V with V\n<sub>DD</sub>\n ranging from -5 V to -25 V, which is the highest gain achieved of diamond inverters, due to the high on/off ratio and low SS of E-mode FET. This circuit exhibits proper functions up to 200 °C, demonstrating a good thermal stability. These results indicate the great potential and possibilities for diamond smart power integrated circuit application.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"45 10","pages":"1698-1701"},"PeriodicalIF":4.1000,"publicationDate":"2024-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Directly Coupled Hydrogenated Diamond FET Logic Circuit With High Voltage Gain\",\"authors\":\"Yuesong Liang;Wei Wang;Fang Lin;Tianlin Niu;Genqiang Chen;Fei Wang;Qi Li;Shi He;Minghui Zhang;Yanfeng Wang;Feng Wen;Hong-Xing Wang\",\"doi\":\"10.1109/LED.2024.3448363\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The directly coupled hydrogen-terminated diamond FET logic (DCHDFL) circuit is fabricated. The E-mode and D-mode FETs are assigned as driver and load devices of the DCHDFL circuit to achieve inversion characteristics. The E-mode FET showcases high I\\n<sub>DSmax</sub>\\n of 53.3mA/mm, V\\n<sub>TH</sub>\\n of -0.8 V, low SS of 98 mV/dec and on/off ratio of 10\\n<sup>9</sup>\\n, which enable input/output logic level matching with a low drive/load ratio of 1.0. The peak gain of circuit increases from 12.57 to 36.3 V/V with V\\n<sub>DD</sub>\\n ranging from -5 V to -25 V, which is the highest gain achieved of diamond inverters, due to the high on/off ratio and low SS of E-mode FET. This circuit exhibits proper functions up to 200 °C, demonstrating a good thermal stability. These results indicate the great potential and possibilities for diamond smart power integrated circuit application.\",\"PeriodicalId\":13198,\"journal\":{\"name\":\"IEEE Electron Device Letters\",\"volume\":\"45 10\",\"pages\":\"1698-1701\"},\"PeriodicalIF\":4.1000,\"publicationDate\":\"2024-08-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Electron Device Letters\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10644005/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10644005/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
制作了直接耦合氢端金刚石场效应晶体管逻辑（DCHDFL）电路。E 模式和 D 模式场效应晶体管分别用作 DCHDFL 电路的驱动器和负载器件，以实现反相特性。E 模式场效应晶体管具有 53.3mA/mm 的高 IDSmax、-0.8 V 的 VTH、98 mV/dec 的低 SS 和 109 的导通/关断比，从而能以 1.0 的低驱动/负载比实现输入/输出逻辑电平匹配。在 VDD 为 -5 V 至 -25 V 时，电路的峰值增益从 12.57 V/V 增至 36.3 V/V，这是菱形逆变器中实现的最高增益，原因是 E 模式场效应晶体管具有高导通/关断比和低 SS。该电路在高达 200 °C 的温度下仍能正常工作，显示出良好的热稳定性。这些结果表明了金刚石智能功率集成电路应用的巨大潜力和可能性。
Directly Coupled Hydrogenated Diamond FET Logic Circuit With High Voltage Gain
The directly coupled hydrogen-terminated diamond FET logic (DCHDFL) circuit is fabricated. The E-mode and D-mode FETs are assigned as driver and load devices of the DCHDFL circuit to achieve inversion characteristics. The E-mode FET showcases high I
DSmax
of 53.3mA/mm, V
TH
of -0.8 V, low SS of 98 mV/dec and on/off ratio of 10
9
, which enable input/output logic level matching with a low drive/load ratio of 1.0. The peak gain of circuit increases from 12.57 to 36.3 V/V with V
DD
ranging from -5 V to -25 V, which is the highest gain achieved of diamond inverters, due to the high on/off ratio and low SS of E-mode FET. This circuit exhibits proper functions up to 200 °C, demonstrating a good thermal stability. These results indicate the great potential and possibilities for diamond smart power integrated circuit application.
期刊介绍：
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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