Fanout-Based Reliability Model for SER Estimation in Combinational Circuits

Soft errors in Integrated Circuits (ICs) have always been a major concern, particularly as CMOS technology nodes continue to shrink, resulting in higher frequency, lower power, and smaller areas, exacerbating radiation-induced soft errors. Therefore, Single Event Transient (SET) has become a crucial consideration in designing modern radiation-tolerant circuits, as it has the potential to cause failures in circuit outputs. This paper employs the concept of signal probability for transient fault propagation in circuits. Considering the issue of transient fault-masking, an error propagation model is presented for each fault-masking case. Furthermore, approaches are proposed for both probabilistic and time-based scenarios to address the impact of re-convergent paths on transient error propagation. Since considering re-convergent paths increases computational complexity, three computational algorithms are proposed in this paper aiming to reduce the size of the probability matrix as much as possible. We compared the simulation results with the Monte-Carlo method and HSPICE-based simulation to validate the proposed method. According to the simulation results on ISCAS’85 benchmarks, the proposed approach for estimating the single event rate exhibits an average relative error percentage of less than 5% compared to traditional fault injection estimation.