使用侵入式 MEA 的 BCI 端到端信号处理技术调查。

Andreas Erbslöh, Leo Buron, Zia Ur-Rehman, Simon Musall, Camilla Hrycak, Philipp Löhler, Christian Klaes, Karsten Seidl, Gregor Schiele
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摘要

现代脑机接口和神经植入物可以让患有神经退行性疾病或受伤的组织、用户和环境进行互动。这种互动可以通过使用穿透性/侵入性微电极进行细胞外记录和刺激(如犹他或密歇根阵列)来实现。对细胞外记录进行特定应用信号处理,可以检测交互作用并实现用户交互。例如,它可以从大脑信号记录中读出运动意图,从而控制假肢或外骨骼。为此,研究中使用了计算复杂的算法,这些算法无法在芯片或嵌入式系统上执行。因此,从电极阵列上的信号条件到模拟预处理,再到尖峰排序,最后到神经解码过程,端到端处理流水线的优化对于硬件推理是必要的,这样才能实现实时的本地信号处理,并使系统结构紧凑,达到较高的舒适度。本文介绍了在此类神经设备硬件上对神经活动进行端到端信号处理流水线的系统架构和算法,包括:(i) 片上信号预处理;(ii) 片上或嵌入式硬件上的尖峰排序;(iii) 工作站上的神经解码。硬件实施的一个特别重点是低功耗电子设计,以及具有低计算量和极短延迟的人工智能算法。为此,我们简要介绍了当前面临的挑战以及在新型机器学习技术的支持下可能采取的解决方案。此外,我们还介绍了下一代生物识别(BCI)的未来愿景。
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Technical survey of end-to-end signal processing in BCIs using invasive MEAs.

Modern brain-computer interfaces and neural implants allow interaction between the tissue, the user and the environment, where people suffer from neurodegenerative diseases or injuries.This interaction can be achieved by using penetrating/invasive microelectrodes for extracellular recordings and stimulation, such as Utah or Michigan arrays. The application-specific signal processing of the extracellular recording enables the detection of interactions and enables user interaction. For example, it allows to read out movement intentions from recordings of brain signals for controlling a prosthesis or an exoskeleton. To enable this, computationally complex algorithms are used in research that cannot be executed on-chip or on embedded systems. Therefore, an optimization of the end-to-end processing pipeline, from the signal condition on the electrode array over the analog pre-processing to spike-sorting and finally the neural decoding process, is necessary for hardware inference in order to enable a local signal processing in real-time and to enable a compact system for achieving a high comfort level. This paper presents a survey of system architectures and algorithms for end-to-end signal processing pipelines of neural activity on the hardware of such neural devices, including (i) on-chip signal pre-processing, (ii) spike-sorting on-chip or on embedded hardware and (iii) neural decoding on workstations. A particular focus for the hardware implementation is on low-power electronic design and artifact-robust algorithms with low computational effort and very short latency. For this, current challenges and possible solutions with support of novel machine learning techniques are presented in brief. In addition, we describe our future vision for next-generation BCIs.

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