Multi-bit error detection and correction technique using HVDK (Horizontal-Vertical-Diagonal-Knight) parity

In a data stream, errors are quite likely to occur and sometimes this is much more terrible. So, data safety is very important in digital systems, especially in critical and real-time systems, microprocessors, embedded systems, computer memory, and data communication. The probability of soft error increases with the exponential rate of increasing transistor per chip, operational voltage, particle strike, condensation of bit-cell area, etc. To ensure data integrity, safety, and system reliability, error detection, and correction are fundamental components of data transmission and storage systems. Existing error correction techniques can solve several bits of error. However, these existing methods are not fully efficient, as some consume a lot of time, space, and bit overhead. An ideal approach will have the potential to minimize all of these parameters. This research paper proposes a novel error correction approach with horizontal, vertical, diagonal, and knight (HVDK) parity bits. This approach has been taken to correct 5-bit errors in 64 bits of data word using the parity-based technique with less bit overhead. Our research advances the knowledge of error correction methods and sheds light on how to pick and use parity bit schemes that are appropriate for different applications.