使用 G 类线性放大器和单电感器双输入双输出转换器的高效包络跟踪电源调制器,用于 5G NR 功率放大器

IF 4.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-10-29 DOI:10.1109/JSSC.2024.3481906
Changjin Chen;Ximing Li;Rui Hu;Lin Cheng
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引用次数: 0

摘要

本文介绍了一种混合包络跟踪电源调制器(ETSM),它由一个G类线性放大器(LA)、一个单电感双输入双输出(SIDIDO)转换器和一个开关放大器(SA)组成,适用于5G新无线电(NR)功率放大器(PA)。通过额外的电源轨,G 类 LA 可实时检测输入信号的振幅,在信号波动较大时自适应地使用较高的电源轨,并在信号波动减小时无缝过渡到较低的电源轨。这种运行方式有效地降低了 LA 的偏置、灌电流和源电流的平均压降,从而在跟踪带宽 (BW) 高达 200 MHz 时提高了电源调制器 (SM) 的效率。为了减轻不同电源轨之间的高速切换对输出包络造成的失真,我们引入了一种平滑过渡技术,以实现高线性度。SIDIDO 转换器用于高效、低成本地生成 LA 的电源轨。SM 采用 65 纳米 CMOS 工艺制造。在 5~\Omega 美元与 200 pF 电容并联的功率放大器模型下,它在跟踪 NR 200-MHz 包络线时的峰值效率为 83.4%,输出摆幅范围为 1-5-V。
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A High-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 5G NR Power Amplifier
This article presents a hybrid envelope tracking supply modulator (ETSM) comprising a class-G linear amplifier (LA), a single-inductor dual-input-dual-output (SIDIDO) converter and a switching amplifier (SA) for 5G new radio (NR) power amplifiers (PAs). With an additional supply rail, the class-G LA detects the amplitude of the input signal in real-time, adaptively utilizes the higher supply rail when the signal exhibits large swings, and seamlessly transitions to the lower supply rail when the signal swing decreases. This operation effectively reduces the average voltage drop of LA’s bias, sinking and sourcing current, thus improving the supply modulator (SM) efficiency at tracking bandwidth (BW) as high as 200 MHz. To mitigate the distortion induced on the output envelope due to high-speed switching between the different supply rails, a smooth transition technique is introduced for high linearity. An SIDIDO converter is employed to generate the LA’s supply rails efficiently and cost-effectively. The SM is fabricated in a 65-nm CMOS process. It measures 83.4% peak efficiency when tracking the NR 200-MHz envelope with 1–5-V wide output swing range at the PA model of $5~\Omega $ in parallel with 200 pF capacitance.
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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