基于增强抗噪性的抗辐射Domino逻辑Schmitt触发电路

IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Device and Materials Reliability Pub Date : 2024-11-12 DOI:10.1109/TDMR.2024.3496821
Aryan Kannaujiya;Shubham Singh;Ambika Prasad Shah;Daniele Rossi
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引用次数: 0

摘要

这项工作提出了增强磁滞宽度的抗噪声辐射硬化施密特触发电路。基于双模domino的Schmitt触发器(DST)电路被用于双重目的,因为它包含一个既充当domino逻辑和Schmitt触发器电路的控制模块。对于各种ST电路,确定了关键性能指标,包括滞后宽度,功耗,延迟,工艺变化和敏感节点的临界电荷。研究结果表明,与其他参考电路相比,DST具有更好的性能指标。与传统ST相比,所提出的DST的动态功率、泄漏功率和传播延迟分别降低了3.89倍、1.58倍和1.03倍。DST的迟滞宽度比传统ST高1.32倍,这使得它在噪声环境中更加实用。所有的模拟工作都由Cadence virtuoso工具处理,采用UMC 40nm技术。
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Radiation Hardened Domino Logic-Based Schmitt Trigger Circuit With Improved Noise Immunity
This work presents enhanced hysteresis width for noise-immune radiation-hardened Schmitt trigger circuits. A dual-mode Domino-based Schmitt trigger (DST) circuit is employed for dual purposes owing to the inclusion of a control module that functions as both a domino logic and a Schmitt trigger circuit. For various ST circuits, key performance metrics including hysteresis width, power consumption, latency, process variation, and critical charge at sensitive nodes are determined. The findings demonstrate that, in comparison to other reference circuits, the DST has improved performance metrics. The proposed DST has $3.89\times $ , $1.58\times $ , and $1.03\times $ lower dynamic power, leakage power, and propagation delay, respectively in comparison to conventional ST. The hysteresis width of DST is $1.32\times $ higher than conventional ST which makes it more practical for a noisy environment. All the simulation work has been handled by the Cadence virtuoso tool using UMC 40nm technology.
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来源期刊
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Device and Materials Reliability 工程技术-工程:电子与电气
CiteScore
4.80
自引率
5.00%
发文量
71
审稿时长
6-12 weeks
期刊介绍: The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
期刊最新文献
2024 Index IEEE Transactions on Device and Materials Reliability Vol. 24 Table of Contents Blank Page IEEE Transactions on Device and Materials Reliability Information for Authors TechRxiv: Share Your Preprint Research with the World!
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