Investigation of Deuterium De-Passivation by Repetitive Thermal Stress in CMOS Fabrication

High-pressure deuterium annealing (HPDA) has been proposed as a promising process to enhance device performance and reliability. However, additional thermal stress after the HPDA can lead to de-passivation of Si-D bonds at the gate dielectric interface. In this study, electrical characterization of deuterium annealed MOSFETs after repetitive thermal stress conditions is performed to obtain guidelines for conducting post-metal annealing. MOSFETs are fabricated on silicon wafer to verify the passivation as well as de-passivation of deuterium. Device parameters including subthreshold swing (SS), on-state current $(I_{\mathrm { ON}})$ , off-state current $(I_{\mathrm { OFF}})$ , and gate leakage $(I_{\mathrm { G}})$ , are comprehensively compared. Finally, hot-carrier injection (HCI) stress is applied to compare the changes in stress immunity resulting from deuterium de-passivation.