面向多gpu平台的机器学习训练通用性能建模

IF 5.6 2区 计算机科学 Q1 COMPUTER SCIENCE, THEORY & METHODS IEEE Transactions on Parallel and Distributed Systems Pub Date : 2024-11-28 DOI:10.1109/TPDS.2024.3507814
Zhongyi Lin;Ning Sun;Pallab Bhattacharya;Xizhou Feng;Louis Feng;John D. Owens
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引用次数: 0

摘要

在cpu、gpu和网络设备之间分布计算和通信的计算系统上,描述和预测现代机器学习(ML)工作负载的训练性能不仅是优化和规划的关键,也是一个复杂的目标。主要挑战包括cpu和gpu之间同步和负载平衡的复杂性,输入数据分布的差异,以及连接多个计算设备的不同通信设备和拓扑(例如,NVLink, PCIe,网卡)的使用,以及对灵活训练配置的需求。基于我们之前针对单gpu平台的工作,我们解决了这些挑战,并通过将(1)用于嵌入表查找的数据分布感知性能模型,以及(2)通信集体的数据移动预测,整合到我们升级的性能建模管道中,该管道配备了在多gpu平台上训练的ML工作负载的秩间和秩内同步。除了在两个多gpu平台上准确预测随机配置的深度学习推荐模型(DLRM)模型的每次迭代训练时间(几何误差为5.21%)之外,我们的预测管道还可以很好地推广到其他类型的机器学习工作负载,例如基于transformer的自然语言处理(NLP)模型,几何误差为3.00%。此外,即使没有在硬件上实际运行像dlrm这样的机器学习工作负载,它也能够生成洞察力,例如快速选择最快的嵌入表分片配置(成功率为85%)。
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Towards Universal Performance Modeling for Machine Learning Training on Multi-GPU Platforms
Characterizing and predicting the training performance of modern machine learning (ML) workloads on compute systems with compute and communication spread between CPUs, GPUs, and network devices is not only the key to optimization and planning but also a complex goal to achieve. The primary challenges include the complexity of synchronization and load balancing between CPUs and GPUs, the variance in input data distribution, and the use of different communication devices and topologies (e.g., NVLink, PCIe, network cards) that connect multiple compute devices, coupled with the desire for flexible training configurations. Built on top of our prior work for single-GPU platforms, we address these challenges and enable multi-GPU performance modeling 1 by incorporating (1) data-distribution-aware performance models for embedding table lookup, and (2) data movement prediction of communication collectives, into our upgraded performance modeling pipeline equipped with inter-and intra-rank synchronization for ML workloads trained on multi-GPU platforms. Beyond accurately predicting the per-iteration training time of deep learning recommendation models (DLRM) models with random configurations with a geomean error of 5.21% on two multi-GPU platforms, our prediction pipeline generalizes well to other types of ML workloads, such as Transformer-based natural language processing (NLP) models with a geomean error of 3.00%. Moreover, even without actually running ML workloads like DLRMs on the hardware, it is capable of generating insights such as quickly selecting the fastest embedding table sharding configuration (with a success rate of 85%).
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来源期刊
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems 工程技术-工程:电子与电气
CiteScore
11.00
自引率
9.40%
发文量
281
审稿时长
5.6 months
期刊介绍: IEEE Transactions on Parallel and Distributed Systems (TPDS) is published monthly. It publishes a range of papers, comments on previously published papers, and survey articles that deal with the parallel and distributed systems research areas of current importance to our readers. Particular areas of interest include, but are not limited to: a) Parallel and distributed algorithms, focusing on topics such as: models of computation; numerical, combinatorial, and data-intensive parallel algorithms, scalability of algorithms and data structures for parallel and distributed systems, communication and synchronization protocols, network algorithms, scheduling, and load balancing. b) Applications of parallel and distributed computing, including computational and data-enabled science and engineering, big data applications, parallel crowd sourcing, large-scale social network analysis, management of big data, cloud and grid computing, scientific and biomedical applications, mobile computing, and cyber-physical systems. c) Parallel and distributed architectures, including architectures for instruction-level and thread-level parallelism; design, analysis, implementation, fault resilience and performance measurements of multiple-processor systems; multicore processors, heterogeneous many-core systems; petascale and exascale systems designs; novel big data architectures; special purpose architectures, including graphics processors, signal processors, network processors, media accelerators, and other special purpose processors and accelerators; impact of technology on architecture; network and interconnect architectures; parallel I/O and storage systems; architecture of the memory hierarchy; power-efficient and green computing architectures; dependable architectures; and performance modeling and evaluation. d) Parallel and distributed software, including parallel and multicore programming languages and compilers, runtime systems, operating systems, Internet computing and web services, resource management including green computing, middleware for grids, clouds, and data centers, libraries, performance modeling and evaluation, parallel programming paradigms, and programming environments and tools.
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