{"title":"用于高效电压堆叠系统的变频降压-升压变换器","authors":"Nurzhan Zhuldassov, Kan Xu, Eby G. Friedman","doi":"10.1007/s10470-024-02297-6","DOIUrl":null,"url":null,"abstract":"<div><p>The rise of mobile technologies and cloud computing has increased the importance of efficient energy consumption. Due to parallelism, high voltage conversion ratios, and large supply currents, power losses are rapidly increasing. This issue can be managed by on-package voltage stacking, where the current is recycled between multiple cores. Current mismatch between serially connected cores however produces a noise voltage between the cores. Differential power processing (DPP) converters are a potential solution to this issue. In the current work, a power efficient, load-to-load synchronous buck converter operating within a voltage stacked system is examined. The buck converter is evaluated under very high current demand, where the core currents in a voltage stacked system reach a tenfold difference. A compact model to characterize the voltage drop in serially stacked systems is also described. Furthermore, a circuit topology to increase the power efficiency of this converter is proposed. By using an interleaved system with different active phases, the inductance in the converter can be changed, which produces variable frequency operation, resulting in increased power efficiency due to lower switching losses. The power efficiency of the converter is increased by up to 8% as compared to constant frequency operation, achieving a range between 89% to 99%.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"122 1","pages":""},"PeriodicalIF":1.2000,"publicationDate":"2024-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Variable frequency buck-boost converter for high efficiency voltage stacked systems\",\"authors\":\"Nurzhan Zhuldassov, Kan Xu, Eby G. Friedman\",\"doi\":\"10.1007/s10470-024-02297-6\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>The rise of mobile technologies and cloud computing has increased the importance of efficient energy consumption. Due to parallelism, high voltage conversion ratios, and large supply currents, power losses are rapidly increasing. This issue can be managed by on-package voltage stacking, where the current is recycled between multiple cores. Current mismatch between serially connected cores however produces a noise voltage between the cores. Differential power processing (DPP) converters are a potential solution to this issue. In the current work, a power efficient, load-to-load synchronous buck converter operating within a voltage stacked system is examined. The buck converter is evaluated under very high current demand, where the core currents in a voltage stacked system reach a tenfold difference. A compact model to characterize the voltage drop in serially stacked systems is also described. Furthermore, a circuit topology to increase the power efficiency of this converter is proposed. By using an interleaved system with different active phases, the inductance in the converter can be changed, which produces variable frequency operation, resulting in increased power efficiency due to lower switching losses. The power efficiency of the converter is increased by up to 8% as compared to constant frequency operation, achieving a range between 89% to 99%.</p></div>\",\"PeriodicalId\":7827,\"journal\":{\"name\":\"Analog Integrated Circuits and Signal Processing\",\"volume\":\"122 1\",\"pages\":\"\"},\"PeriodicalIF\":1.2000,\"publicationDate\":\"2024-12-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Analog Integrated Circuits and Signal Processing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10470-024-02297-6\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-024-02297-6","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Variable frequency buck-boost converter for high efficiency voltage stacked systems
The rise of mobile technologies and cloud computing has increased the importance of efficient energy consumption. Due to parallelism, high voltage conversion ratios, and large supply currents, power losses are rapidly increasing. This issue can be managed by on-package voltage stacking, where the current is recycled between multiple cores. Current mismatch between serially connected cores however produces a noise voltage between the cores. Differential power processing (DPP) converters are a potential solution to this issue. In the current work, a power efficient, load-to-load synchronous buck converter operating within a voltage stacked system is examined. The buck converter is evaluated under very high current demand, where the core currents in a voltage stacked system reach a tenfold difference. A compact model to characterize the voltage drop in serially stacked systems is also described. Furthermore, a circuit topology to increase the power efficiency of this converter is proposed. By using an interleaved system with different active phases, the inductance in the converter can be changed, which produces variable frequency operation, resulting in increased power efficiency due to lower switching losses. The power efficiency of the converter is increased by up to 8% as compared to constant frequency operation, achieving a range between 89% to 99%.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.