Dongkwun Kim;Zhaoqing Wang;Paul Xuanyuanliang Huang;Pavan Kumar Chundi;Suhwan Kim;Andrés A. Blanco;Ram K. Krishnamurthy;Mingoo Seok
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引用次数: 0
摘要
本文提出了一种锂离子电池兼容的单电感多输出(SIMO)降压转换器,它满足了集成的毫瓦以下RISC-V微处理器的电源管理需求。所提出的转换器可以直接采用4.2 V的电池电压,并产生从1.8 V的I/O到0.5 V的处理器核心的四个电源轨。选择三电平输入级是为了减小电感纹波大小和开关损耗,从而提高功率转换效率。此外,采用新型多米诺闪存模数转换器(adc)的全数字实现可以实现低静态电流。此外,脉冲频率调制(PFM)具有宽的动态范围。所提出的三电平SIMO转换器已采用65纳米CMOS技术和32位RISC-V处理器进行原型设计。测量结果表明,该转换器实现了$1000\times $负载电流范围($0.8~ $ a - 0.8 mA),以支持处理器的活动或休眠模式。转换器的PCE为56.2%-72.8%。与理想的buck-low-dropout电压调节器(LDO)架构(仅LDO)相比,PCE提高了23.8%(46.4%)。
A 4.2-to-0.5-V, 0.8-μA–0.8-mA, Power-Efficient Three-Level SIMO Buck Converter for a Quad-Voltage RISC-V Microprocessor
This article presents a Li-ion battery-compatible single-inductor-multiple-output (SIMO) buck converter that fulfills the power management need of an integrated sub-mW RISC-V microprocessor. The proposed converter can directly take a 4.2-V battery voltage and produce four power rails ranging from 1.8 V for I/O to 0.5 V for the processor core. The three-level input stage is chosen to reduce the inductor ripple size and switching loss, thus increasing power conversion efficiency (PCE). In addition, the fully digital implementation using novel domino flash analog-digital converters (ADCs) enables low static current. Also, pulse frequency modulation (PFM) results in a wide dynamic range. The proposed three-level SIMO converter has been prototyped in a 65-nm CMOS technology with the 32-bit RISC-V processor. Measurement results show that the converter achieves a
$1000\times $
load current range (
$0.8~\mu $
A–0.8 mA) to support the active or sleep modes of the processor. The converter marks the PCE of 56.2%–72.8%. Compared to the ideal buck-low-dropout voltage regulator (LDO) architecture (LDO-only), it improves the PCE by 23.8% (46.4%).
期刊介绍:
The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society.
Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels.
To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.