基于耦合线的负载调制平衡放大器MMIC的设计与分析

IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-11-07 DOI:10.1109/TCSI.2024.3489555
Jingyuan Zhang;Weichen Zhao;Baoguo Yang;Xu Yan;Yongxin Guo
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引用次数: 0

摘要

本文介绍了一种基于全集成耦合线负载调制平衡放大器(CLLMBA)的单片微波集成电路(MMIC)的设计原理和实现方法。为了方便设计,提出了一种新的CLLMBA设计方法,通过安排控制放大器(CA)和平衡放大器(BAs)之间的电流比来精确控制负载调制和输出功率回退(OBO)电平。此外,为了进一步扩大工作带宽,CLLMBA采用了耦合线耦合器。随后,基于基频下的负载调制分析,精确选择了三个子放大器的物理尺寸和工作条件。它导致适当调制的阻抗,并消除了子放大器的输出匹配网络。双金属层和空气桥采用曲径兰格耦合器,布局紧凑。为了验证所提出的技术,在0.25- $ $ mu $ m GaN HEMT工艺中实现并制造了CLLMBA原型,其模具尺寸为$3.1 × 2.3$ mm2。测量结果显示,在4 ~ 6 GHz范围内,10 db OBO的饱和输出功率为38.1 ~ 39.3 dBm,饱和漏极效率(DE)为45.8% ~ 57.6%,DE为31.7% ~ 42.3%。此外,在峰均功率比(PAPR)为8.5 dB的100 MHz正交频分复用(OFDM)信号下,平均DE为32.8% ~ 40.6%,数字预失真后的相邻信道泄漏比(ACLR)优于- 47.5 dBc。
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Design and Analysis of a Coupled-Line-Based Load-Modulated Balanced Amplifier MMIC With Enhanced Bandwidth Performance
This article presents the design theory and implementation of a fully integrated coupled-line-based load-modulated balanced amplifier (CLLMBA) monolithic microwave integrated circuit (MMIC). To facilitate the design, a novel design method is proposed for the CLLMBA to precisely control the load modulation and output power back-off (OBO) level by arranging the current ratio among the control amplifier (CA) and balanced amplifiers (BAs). Moreover, to further expand the working bandwidth, the coupled-line couplers are adopted in the CLLMBA. Subsequently, the physical dimensions and operating conditions of the three sub-amplifiers are selected accurately based on load modulation analysis at the fundamental frequency. It leads to properly modulated impedances and cancels the output matching networks for sub-amplifiers. Besides, meandering lange couplers are adopted by double metal layers and air-bridges for a compact layout. To validate the proposed techniques, a CLLMBA prototype is implemented and fabricated in a commercial 0.25- $\mu $ m GaN HEMT process with the die size of $3.1\times 2.3$ mm2. The measurement result exhibits a 38.1-39.3 dBm saturated output power with a 45.8%-57.6% saturated drain efficiency (DE), and a 31.7%-42.3% DE at 10-dB OBO from 4 to 6 GHz. Furthermore, under a 100 MHz orthogonal frequency division multiplexing (OFDM) signal with 8.5 dB peak-to-average power ratio (PAPR), the average DE is 32.8%-40.6% and the adjacent channel leakage ratio (ACLR) after digital predistortion is better than −47.5 dBc.
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来源期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers 工程技术-工程:电子与电气
CiteScore
9.80
自引率
11.80%
发文量
441
审稿时长
2 months
期刊介绍: TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.
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Table of Contents IEEE Circuits and Systems Society Information IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information Guest Editorial Special Issue on Emerging Hardware Security and Trust Technologies—AsianHOST 2023
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