基于峰值神经网络和FPGA平台的交通标志识别硬件加速研究

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-10-14 DOI:10.1109/TVLSI.2024.3470834
Huarun Chen;Yijun Liu;Wujian Ye;Jialiang Ye;Yuehai Chen;Shaozhen Chen;Chao Han
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引用次数: 0

摘要

现有的交通标志识别方法大多利用卷积神经网络(cnn)等深度学习技术来实现检测精度的突破;但由于CNN的参数较多,在实际应用中存在功耗高、计算量大、速度慢等问题。与CNN相比,SNN能够有效地模拟生物大脑的信息处理机制,具有更强的并行处理能力、更好的稀疏性和实时性。因此,我们设计并实现了一种基于峰值CNN (SCNN)和FPGA平台的新型交通标志识别系统[称为SNN on FPGA-交通标志识别系统(SFPGA-TSRS)]。具体来说,为了提高识别精度,将基于LIF/IF神经元的SCNN与SA机制相结合,提出了一种交通标志识别模型空间注意SCNN (SA-SCNN);为了加速模型推理,实现了高性能的神经元模块,并设计了输入编码模块作为识别模型的输入层。实验表明,与现有系统相比,本文提出的SFPGA-TSRS能够有效地支持SCNN模型的部署,在GTSRB数据集上的识别准确率达到99.22%,帧率达到66.38帧/秒,功耗低至1.423 W。
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Research on Hardware Acceleration of Traffic Sign Recognition Based on Spiking Neural Network and FPGA Platform
Most of the existing methods for traffic sign recognition exploited deep learning technology such as convolutional neural networks (CNNs) to achieve a breakthrough in detection accuracy; however, due to the large number of CNN’s parameters, there are problems in practical applications such as high power consumption, large calculation, and slow speed. Compared with CNN, a spiking neural network (SNN) can effectively simulate the information processing mechanism of biological brain, with stronger parallel processing capability, better sparsity, and real-time performance. Thus, we design and realize a novel traffic sign recognition system [called SNN on FPGA-traffic sign recognition system (SFPGA-TSRS)] based on spiking CNN (SCNN) and FPGA platform. Specifically, to improve the recognition accuracy, a traffic sign recognition model spatial attention SCNN (SA-SCNN) is proposed by combining LIF/IF neurons based SCNN with SA mechanism; and to accelerate the model inference, a neuron module is implemented with high performance, and an input coding module is designed as the input layer of the recognition model. The experiments show that compared with existing systems, the proposed SFPGA-TSRS can efficiently support the deployment of SCNN models, with a higher recognition accuracy of 99.22%, a faster frame rate of 66.38 frames per second (FPS), and lower power consumption of 1.423 W on the GTSRB dataset.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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