低温(~ 90℃)原子层沉积在Ge上生长Al2O3及其在MOS器件中的应用

IF 4.6 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Materials Science in Semiconductor Processing Pub Date : 2025-05-01 Epub Date: 2025-02-10 DOI:10.1016/j.mssp.2025.109372
Taisei Aso , Hajime Kuwazuru , Dong Wang , Keisuke Yamamoto
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引用次数: 0

摘要

低温器件工艺是基于锗(Ge)和锗锡(GeSn)的新型电子/光学/自旋电子学/柔性器件应用所必需的。在栅极堆和钝化层的绝缘层形成中,原子层沉积(ALD)由于具有精确的膜厚控制和良好的台阶覆盖等优点而得到了广泛的研究和应用。然而,低温ALD尚未应用于上述基于Ge(Sn)的新型器件。在这项研究中,我们研究了在Ge衬底上使用低温(~ 90°C) ALD(不加热样品)沉积Al₂O₃,并研究了提高薄膜质量和电性能的方法。我们发现在Ge上直接低温ALD导致了凹痕的形成,我们将其归因于表面亲水性变化引起的ALD生长不均匀。为了避免这种情况,我们在低温ALD之前引入了由电子回旋共振(ECR)等离子体形成的GeO₂下层,成功地防止了凹陷并改善了表面均匀性。所得的Al/Al₂O₃/GeO₂/Ge金属氧化物半导体(MOS)电容器表现出增强的电气特性。此外,MOS场效应晶体管(FET)在栅极堆工艺温度最高为130°C时,表现出典型的工作行为。这种低温ALD方法为新兴的Ge(Sn)基器件应用中的低温栅极堆栈和钝化层制造提供了一条有前途的途径。
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Al2O3 growth on Ge by low-temperature (∼90 °C) atomic layer deposition and its application for MOS devices
A low-temperature device process is necessary for germanium (Ge) and germanium tin (GeSn)-based novel electronics/optics/spintronics/flexible device applications. Concerning insulating layer formation for gate stack and passivation layer, atomic layer deposition (ALD) has been widely studied and applied due to advantages, as exemplified by precise film thickness control and excellent step coverage. However, low-temperature ALD has not been applied to the abovementioned Ge(Sn)-based novel devices. In this study, we investigated Al₂O₃ deposition using low-temperature (∼90 °C) ALD (without sample heating) on Ge substrates and examined methods to enhance film quality and electrical properties. We found that direct low-temperature ALD on Ge led to dimple formation, which we attribute to uneven ALD growth caused by variations in surface hydrophilicity. To avoid this, we introduced a GeO₂ underlayer formed by electron cyclotron resonance (ECR) plasma before low-temperature ALD, successfully preventing dimples and improving surface uniformity. The resulting Al/Al₂O₃/GeO₂/Ge metal-oxide-semiconductor (MOS) capacitor demonstrated enhanced electrical characteristics. Additionally, a MOS field-effect transistor (FET) with gate stacks fabricated at a maximum gate stack process temperature of 130 °C exhibited typical operational behavior. This low-temperature ALD approach offers a promising pathway for low-temperature gate stack and passivation layer fabrication in emerging Ge(Sn)-based device applications.
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来源期刊
Materials Science in Semiconductor Processing
Materials Science in Semiconductor Processing 工程技术-材料科学:综合
CiteScore
8.00
自引率
4.90%
发文量
780
审稿时长
42 days
期刊介绍: Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy. Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications. Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.
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