一种多模PSR反激变换器的组合EMI抑制方案

IF 3.1 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-10-14 DOI:10.1109/TVLSI.2024.3470837
Yongyuan Li;Zhuliang Li;Wei Guo;Qiang Wu;Yongbo Zhang;Yong You;Zhangming Zhu
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引用次数: 0

摘要

电磁干扰是电力电子应用中不可避免的问题。虽然已经提出了多种方法来衰减电磁干扰噪声,但对于多模一次侧调节(PSR)反激变换器中电磁干扰抑制方案的研究仍然很少。针对多模PSR反激变换器中的电磁干扰调节,采用调频和双坡栅驱动组合的电磁干扰抑制方案,满足严格的电磁干扰要求,简化了外围器件和电磁干扰滤波器的设计。所提出的方案在$0.18~\mu $ m 5/40 V BCD工艺中实现,所占用的芯片尺寸(含焊盘)为$1.05\ × 0.8$ mm2。实验结果表明,线极性/中性极性的传导电磁干扰波形很容易符合规定。在不同输入和负载下,输出电压偏差在±1.3%以内,峰值效率可达90%。
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A Combo EMI Suppression Scheme for Multimode PSR Flyback Converter
Electromagnetic interference (EMI) is an inevitable issue in power electronics applications. Although many kinds of solutions have been presented to attenuate EMI noise, there is still little research about the EMI suppression scheme utilized in multimode primary-side regulation (PSR) flyback converters. Targeting EMI regulation in multimode PSR flyback converter, a combo EMI suppression scheme comprised of frequency modulation and dual-slope gate driver is adopted to meet stringent EMI requirements, simplifying peripheral components and design of EMI filter. The proposed scheme is implemented in $0.18~\mu $ m 5/40 V BCD process and occupies a die size (with pads) of $1.05\times 0.8$ mm2. The experimental results show that the conducted EMI waveforms with line/neutral polarity can easily comply with regulations. The deviations of the output voltage are within ±1.3% under different inputs and loads while the peak effciency of 90% is achieved.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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