自限制镍硅₂的形成以改善镍硅₂诱导结晶并开发具有自对齐镍硅₂诱导侧向结晶的高性能多晶硅场效应晶体管

IF 2.9 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Electron Devices Pub Date : 2025-01-23 DOI:10.1109/TED.2025.3527423
Shujuan Mao;Xianglie Sun;Jinbiao Liu;Guobin Bai;Chenchen Zhang;Wenjuan Xiong;Jianfeng Gao;Jun Luo;Guilei Wang;Zhao Chao
{"title":"自限制镍硅₂的形成以改善镍硅₂诱导结晶并开发具有自对齐镍硅₂诱导侧向结晶的高性能多晶硅场效应晶体管","authors":"Shujuan Mao;Xianglie Sun;Jinbiao Liu;Guobin Bai;Chenchen Zhang;Wenjuan Xiong;Jianfeng Gao;Jun Luo;Guilei Wang;Zhao Chao","doi":"10.1109/TED.2025.3527423","DOIUrl":null,"url":null,"abstract":"Abstract-In this work, to improve NiSi2-induced crystallization (SIC), NiSi2 formation was experimentally explored with three different silicidation processes. The nucleation and morphology of NiSi2 are significantly improved via lowering the heating rate of two-step rapid thermal processing (RTP). Further adopting the self-limiting formation method, a uniform NiSi2 with an ultra-thin thickness of 38 Å is attained. This formed NiSi2 warrants an increased crystallization and a reduced Ni contamination when used as the inductor to crystallize amorphous Si. Subsequently, integrating this NiSi2 formation scheme to crystallize the channel in a self-aligned manner, high-performance n-type poly-Si field-effect transistors are developed, showing superior electrical characteristics, including high mobility of 69.1 cm2 / V-s, steep subthreshold swing (SS) of 111.47 mV / dec, low leakage current of 4.67 pA / <inline-formula> <tex-math>$\\mu$ </tex-math></inline-formula> m, and a large on-off current ratio of <inline-formula> <tex-math>$2.51 \\times 10^7$ </tex-math></inline-formula>.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1160-1166"},"PeriodicalIF":2.9000,"publicationDate":"2025-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Self-Limiting Formation of NiSi₂ to Improve NiSi₂-Induced Crystallization and Develop High-Performance Poly-Si FETs With Self-Aligned NiSi₂-Induced Lateral Crystallization\",\"authors\":\"Shujuan Mao;Xianglie Sun;Jinbiao Liu;Guobin Bai;Chenchen Zhang;Wenjuan Xiong;Jianfeng Gao;Jun Luo;Guilei Wang;Zhao Chao\",\"doi\":\"10.1109/TED.2025.3527423\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Abstract-In this work, to improve NiSi2-induced crystallization (SIC), NiSi2 formation was experimentally explored with three different silicidation processes. The nucleation and morphology of NiSi2 are significantly improved via lowering the heating rate of two-step rapid thermal processing (RTP). Further adopting the self-limiting formation method, a uniform NiSi2 with an ultra-thin thickness of 38 Å is attained. This formed NiSi2 warrants an increased crystallization and a reduced Ni contamination when used as the inductor to crystallize amorphous Si. Subsequently, integrating this NiSi2 formation scheme to crystallize the channel in a self-aligned manner, high-performance n-type poly-Si field-effect transistors are developed, showing superior electrical characteristics, including high mobility of 69.1 cm2 / V-s, steep subthreshold swing (SS) of 111.47 mV / dec, low leakage current of 4.67 pA / <inline-formula> <tex-math>$\\\\mu$ </tex-math></inline-formula> m, and a large on-off current ratio of <inline-formula> <tex-math>$2.51 \\\\times 10^7$ </tex-math></inline-formula>.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":\"72 3\",\"pages\":\"1160-1166\"},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2025-01-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10851713/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10851713/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

摘要--在这项工作中,为了改善 NiSi2 诱导结晶(SIC),通过三种不同的硅化工艺对 NiSi2 的形成进行了实验探索。通过降低两步快速热处理(RTP)的加热速率,NiSi2 的成核和形貌得到了显著改善。进一步采用自限制形成法,可获得厚度为 38 Å 的超薄均匀 NiSi2。这种已形成的 NiSi2 在用作非晶态硅的结晶感应器时,可提高结晶度并减少镍污染。随后,结合这种 NiSi2 形成方案,以自对准方式结晶沟道,开发出了高性能 n 型多晶硅场效应晶体管,显示出卓越的电气特性,包括 69.1 cm2 / V-s 的高迁移率、111.47 mV / dec 的陡峭亚阈值摆幅 (SS)、4.67 pA / $\mu$ m 的低漏电流和 2.51 \times 10^7$ 的大导通电流比。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Self-Limiting Formation of NiSi₂ to Improve NiSi₂-Induced Crystallization and Develop High-Performance Poly-Si FETs With Self-Aligned NiSi₂-Induced Lateral Crystallization
Abstract-In this work, to improve NiSi2-induced crystallization (SIC), NiSi2 formation was experimentally explored with three different silicidation processes. The nucleation and morphology of NiSi2 are significantly improved via lowering the heating rate of two-step rapid thermal processing (RTP). Further adopting the self-limiting formation method, a uniform NiSi2 with an ultra-thin thickness of 38 Å is attained. This formed NiSi2 warrants an increased crystallization and a reduced Ni contamination when used as the inductor to crystallize amorphous Si. Subsequently, integrating this NiSi2 formation scheme to crystallize the channel in a self-aligned manner, high-performance n-type poly-Si field-effect transistors are developed, showing superior electrical characteristics, including high mobility of 69.1 cm2 / V-s, steep subthreshold swing (SS) of 111.47 mV / dec, low leakage current of 4.67 pA / $\mu$ m, and a large on-off current ratio of $2.51 \times 10^7$ .
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
期刊最新文献
Table of Contents IEEE Transactions on Electron Devices Publication Information Corrections to “Stimulated Secondary Emission of Single-Photon Avalanche Diodes” Call for Papers: Journal of Lightwave Technology Special Issue on OFS-29 Call for Nominations for Editor-in-Chief: IEEE Transactions on Semiconductor Manufacturing
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1