利用负输出反馈的合理转换比开关电容DC-DC变换器。

Wanyeong Jung, Dennis Sylvester, David Blaauw
{"title":"利用负输出反馈的合理转换比开关电容DC-DC变换器。","authors":"Wanyeong Jung,&nbsp;Dennis Sylvester,&nbsp;David Blaauw","doi":"10.1109/ISSCC.2016.7417985","DOIUrl":null,"url":null,"abstract":"Switched-capacitor (SC) DC-DC converters have several advantages over inductive DC-DC converters in that they are easily integrated on-chip and can scale to desired power levels, rendering themselves promising for integrated voltage regulators, especially for small, low-power systems. However, many SC DC-DC converters offer only a few conversion ratios, limiting their use for systems in which either the input or output voltages vary. This is particularly important in wireless systems where battery voltage degrades slowly. [1] proposed a technique to reconfigure cascaded SC converters to achieve arbitrary binary ratios: p/2N, 0<;p<;2N, where N is the number of cascaded stages. This structure was improved in [2] by reversing the cascading order to increase output conductance and in [3] by using a positive feedback approach. However, this design still provides less output conductance than previous works offering only a small fixed number of ratios [4,5]. This paper presents an SC DC-DC converter that can be reconfigured to have any arbitrary rational conversion ratio: p/q, 0<;p<;q≤2N+1. The key idea of the design, which we refer to as a rational DC-DC converter, is to incorporate negative voltage feedback into the cascaded converter stages using negative-generating converter stages (“voltage negators”); this enables reconfiguring of both the numerator p and denominator q of the conversion ratio. With help from the current supply of the voltage negators, output conductance becomes comparable to conventional few-ratio SC DC-DC designs. Hence, the proposed design achieves a resolution higher than previous binary SC converters while maintaining the conversion efficiency of dedicated few-ratio SC converters. Using only 3 cascaded converter stages and 2 voltage negator stages, the rational converter implemented in 0.18μm CMOS offers 79 conversion ratios and achieves >90% efficiency when downconverting from 2V to a 1.1-to-1.86V output voltage range.","PeriodicalId":72811,"journal":{"name":"Digest of technical papers. IEEE International Solid-State Circuits Conference","volume":"2016 ","pages":"218-219"},"PeriodicalIF":0.0000,"publicationDate":"2016-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/ISSCC.2016.7417985","citationCount":"33","resultStr":"{\"title\":\"A Rational-Conversion-Ratio Switched-Capacitor DC-DC Converter Using Negative-Output Feedback.\",\"authors\":\"Wanyeong Jung,&nbsp;Dennis Sylvester,&nbsp;David Blaauw\",\"doi\":\"10.1109/ISSCC.2016.7417985\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Switched-capacitor (SC) DC-DC converters have several advantages over inductive DC-DC converters in that they are easily integrated on-chip and can scale to desired power levels, rendering themselves promising for integrated voltage regulators, especially for small, low-power systems. However, many SC DC-DC converters offer only a few conversion ratios, limiting their use for systems in which either the input or output voltages vary. This is particularly important in wireless systems where battery voltage degrades slowly. [1] proposed a technique to reconfigure cascaded SC converters to achieve arbitrary binary ratios: p/2N, 0<;p<;2N, where N is the number of cascaded stages. This structure was improved in [2] by reversing the cascading order to increase output conductance and in [3] by using a positive feedback approach. However, this design still provides less output conductance than previous works offering only a small fixed number of ratios [4,5]. This paper presents an SC DC-DC converter that can be reconfigured to have any arbitrary rational conversion ratio: p/q, 0<;p<;q≤2N+1. The key idea of the design, which we refer to as a rational DC-DC converter, is to incorporate negative voltage feedback into the cascaded converter stages using negative-generating converter stages (“voltage negators”); this enables reconfiguring of both the numerator p and denominator q of the conversion ratio. With help from the current supply of the voltage negators, output conductance becomes comparable to conventional few-ratio SC DC-DC designs. Hence, the proposed design achieves a resolution higher than previous binary SC converters while maintaining the conversion efficiency of dedicated few-ratio SC converters. Using only 3 cascaded converter stages and 2 voltage negator stages, the rational converter implemented in 0.18μm CMOS offers 79 conversion ratios and achieves >90% efficiency when downconverting from 2V to a 1.1-to-1.86V output voltage range.\",\"PeriodicalId\":72811,\"journal\":{\"name\":\"Digest of technical papers. IEEE International Solid-State Circuits Conference\",\"volume\":\"2016 \",\"pages\":\"218-219\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/ISSCC.2016.7417985\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of technical papers. IEEE International Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2016.7417985\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of technical papers. IEEE International Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2016.7417985","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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A Rational-Conversion-Ratio Switched-Capacitor DC-DC Converter Using Negative-Output Feedback.
Switched-capacitor (SC) DC-DC converters have several advantages over inductive DC-DC converters in that they are easily integrated on-chip and can scale to desired power levels, rendering themselves promising for integrated voltage regulators, especially for small, low-power systems. However, many SC DC-DC converters offer only a few conversion ratios, limiting their use for systems in which either the input or output voltages vary. This is particularly important in wireless systems where battery voltage degrades slowly. [1] proposed a technique to reconfigure cascaded SC converters to achieve arbitrary binary ratios: p/2N, 0<;p<;2N, where N is the number of cascaded stages. This structure was improved in [2] by reversing the cascading order to increase output conductance and in [3] by using a positive feedback approach. However, this design still provides less output conductance than previous works offering only a small fixed number of ratios [4,5]. This paper presents an SC DC-DC converter that can be reconfigured to have any arbitrary rational conversion ratio: p/q, 0<;p<;q≤2N+1. The key idea of the design, which we refer to as a rational DC-DC converter, is to incorporate negative voltage feedback into the cascaded converter stages using negative-generating converter stages (“voltage negators”); this enables reconfiguring of both the numerator p and denominator q of the conversion ratio. With help from the current supply of the voltage negators, output conductance becomes comparable to conventional few-ratio SC DC-DC designs. Hence, the proposed design achieves a resolution higher than previous binary SC converters while maintaining the conversion efficiency of dedicated few-ratio SC converters. Using only 3 cascaded converter stages and 2 voltage negator stages, the rational converter implemented in 0.18μm CMOS offers 79 conversion ratios and achieves >90% efficiency when downconverting from 2V to a 1.1-to-1.86V output voltage range.
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