Optimal Inter-Gate Separation and Overlapped Source of Multi-Channel Line Tunnel FETs

This work comprises of design and simulation of multi-channel line tunnel field-effect transistors (mCLTFETs) by scaling inter-gate separation (IGS) and overlapped source (L _OV ). The scope of the work is to explore the performance boost and optimization of the studied devices by considering geometrical structures, low-bandgap materials, IGS and L _OV of the mCLTFETs. The structure is designed without diminishing the subthreshold swing (SS) and the leakage currents through a spacer technology and strained Si _0.6 Ge _0.4 . The optimal values of IGS and L _OV for the multi-channel concept are estimated subject to several physical constraints of the proposed device. An IGS ≈ 10 nm and a L _OV ≈ L _G /2 are reported as suitable choice for sub-8-nm technological nodes, where SS = 18 mV/dec and I _on /I _off = 10 ⁹ are achieved.