{"title":"基于矩阵进化计算的封装内去耦电容器的有效选择与放置","authors":"Akash Jain;Heman Vaghasiya;Jai Narayan Tripathi","doi":"10.1109/OJNANO.2021.3133213","DOIUrl":null,"url":null,"abstract":"In the era of advanced nanotechnology where billions of transistors are fabricated in a single chip, high-speed operations are challenging due to packaging related issues. In High-Speed Very Large Scale Integration (VLSI) systems, decoupling capacitors are essentially used in power delivery networks to reduce power supply noise and to maintain a low impedance of the power delivery networks. In this paper, the cumulative impedance of a power delivery network is reduced below the target impedance by using state-of-the-art metaheuristic algorithms to choose and place decoupling capacitors optimally. A Matrix-based Evolutionary Computing (MEC) approach is used for efficient usage of metaheuristic algorithms. Two case studies are presented on a practical system to demonstrate the proposed approach. A comparative analysis of the performance of state-of-the-art metaheuristics is presented with the insights of practical implementation. The consistency of results in both the case studies confirms the validity of the proposed appraoch.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"2 ","pages":"191-200"},"PeriodicalIF":1.8000,"publicationDate":"2021-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8782713/9316416/09640572.pdf","citationCount":"6","resultStr":"{\"title\":\"Efficient Selection and Placement of In-Package Decoupling Capacitors Using Matrix-Based Evolutionary Computation\",\"authors\":\"Akash Jain;Heman Vaghasiya;Jai Narayan Tripathi\",\"doi\":\"10.1109/OJNANO.2021.3133213\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the era of advanced nanotechnology where billions of transistors are fabricated in a single chip, high-speed operations are challenging due to packaging related issues. In High-Speed Very Large Scale Integration (VLSI) systems, decoupling capacitors are essentially used in power delivery networks to reduce power supply noise and to maintain a low impedance of the power delivery networks. In this paper, the cumulative impedance of a power delivery network is reduced below the target impedance by using state-of-the-art metaheuristic algorithms to choose and place decoupling capacitors optimally. A Matrix-based Evolutionary Computing (MEC) approach is used for efficient usage of metaheuristic algorithms. Two case studies are presented on a practical system to demonstrate the proposed approach. A comparative analysis of the performance of state-of-the-art metaheuristics is presented with the insights of practical implementation. The consistency of results in both the case studies confirms the validity of the proposed appraoch.\",\"PeriodicalId\":446,\"journal\":{\"name\":\"IEEE Open Journal of Nanotechnology\",\"volume\":\"2 \",\"pages\":\"191-200\"},\"PeriodicalIF\":1.8000,\"publicationDate\":\"2021-12-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/iel7/8782713/9316416/09640572.pdf\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Open Journal of Nanotechnology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/9640572/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"MATERIALS SCIENCE, MULTIDISCIPLINARY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Open Journal of Nanotechnology","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/9640572/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
Efficient Selection and Placement of In-Package Decoupling Capacitors Using Matrix-Based Evolutionary Computation
In the era of advanced nanotechnology where billions of transistors are fabricated in a single chip, high-speed operations are challenging due to packaging related issues. In High-Speed Very Large Scale Integration (VLSI) systems, decoupling capacitors are essentially used in power delivery networks to reduce power supply noise and to maintain a low impedance of the power delivery networks. In this paper, the cumulative impedance of a power delivery network is reduced below the target impedance by using state-of-the-art metaheuristic algorithms to choose and place decoupling capacitors optimally. A Matrix-based Evolutionary Computing (MEC) approach is used for efficient usage of metaheuristic algorithms. Two case studies are presented on a practical system to demonstrate the proposed approach. A comparative analysis of the performance of state-of-the-art metaheuristics is presented with the insights of practical implementation. The consistency of results in both the case studies confirms the validity of the proposed appraoch.