{"title":"基于STDP的脉冲神经网络片上无监督学习","authors":"Abhinav Gupta;Sneh Saurabh","doi":"10.1109/TNANO.2023.3293011","DOIUrl":null,"url":null,"abstract":"In this article, we propose an energy-efficient Ge-based device that enables on-chip unsupervised learning using Spike-Timing-Dependent-Plasticity (STDP) in a Spiking Neural Network (SNN). A Ferromagnetic Domain Wall (FM-DW) based device, which has decoupled read and write paths, is used as a synapse in this work. The proposed device comprises a dual pocket Fully-Depleted Silicon-on-Insulator (FD-SOI) MOSFET with dual asymmetric gates. Using a well-calibrated 2D device simulation model, we show that a pair of such devices can generate a current, which depends exponentially on the temporal correlation of spiking events in the pre- and post-neuronal layer. This current is fed to the FM-DW synapse, which in turn modulates the conductance of the synapse in accordance with the STDP learning rule. The proposed implementation requires 2-3× fewer transistors and offers a lower latency compared to existing literature. We further demonstrate the application of the proposed device at the system-level to train an SNN to recognize handwritten digits in the MNIST dataset and obtained a classification accuracy of 84%.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"22 ","pages":"365-376"},"PeriodicalIF":2.1000,"publicationDate":"2023-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"On-Chip Unsupervised Learning Using STDP in a Spiking Neural Network\",\"authors\":\"Abhinav Gupta;Sneh Saurabh\",\"doi\":\"10.1109/TNANO.2023.3293011\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this article, we propose an energy-efficient Ge-based device that enables on-chip unsupervised learning using Spike-Timing-Dependent-Plasticity (STDP) in a Spiking Neural Network (SNN). A Ferromagnetic Domain Wall (FM-DW) based device, which has decoupled read and write paths, is used as a synapse in this work. The proposed device comprises a dual pocket Fully-Depleted Silicon-on-Insulator (FD-SOI) MOSFET with dual asymmetric gates. Using a well-calibrated 2D device simulation model, we show that a pair of such devices can generate a current, which depends exponentially on the temporal correlation of spiking events in the pre- and post-neuronal layer. This current is fed to the FM-DW synapse, which in turn modulates the conductance of the synapse in accordance with the STDP learning rule. The proposed implementation requires 2-3× fewer transistors and offers a lower latency compared to existing literature. We further demonstrate the application of the proposed device at the system-level to train an SNN to recognize handwritten digits in the MNIST dataset and obtained a classification accuracy of 84%.\",\"PeriodicalId\":449,\"journal\":{\"name\":\"IEEE Transactions on Nanotechnology\",\"volume\":\"22 \",\"pages\":\"365-376\"},\"PeriodicalIF\":2.1000,\"publicationDate\":\"2023-07-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Nanotechnology\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10174725/\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Nanotechnology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10174725/","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
On-Chip Unsupervised Learning Using STDP in a Spiking Neural Network
In this article, we propose an energy-efficient Ge-based device that enables on-chip unsupervised learning using Spike-Timing-Dependent-Plasticity (STDP) in a Spiking Neural Network (SNN). A Ferromagnetic Domain Wall (FM-DW) based device, which has decoupled read and write paths, is used as a synapse in this work. The proposed device comprises a dual pocket Fully-Depleted Silicon-on-Insulator (FD-SOI) MOSFET with dual asymmetric gates. Using a well-calibrated 2D device simulation model, we show that a pair of such devices can generate a current, which depends exponentially on the temporal correlation of spiking events in the pre- and post-neuronal layer. This current is fed to the FM-DW synapse, which in turn modulates the conductance of the synapse in accordance with the STDP learning rule. The proposed implementation requires 2-3× fewer transistors and offers a lower latency compared to existing literature. We further demonstrate the application of the proposed device at the system-level to train an SNN to recognize handwritten digits in the MNIST dataset and obtained a classification accuracy of 84%.
期刊介绍:
The IEEE Transactions on Nanotechnology is devoted to the publication of manuscripts of archival value in the general area of nanotechnology, which is rapidly emerging as one of the fastest growing and most promising new technological developments for the next generation and beyond.