{"title":"基于RRAM/CMOS混合电路的轻量级可配置环形振荡器PUF","authors":"Yijun Cui;Chenghua Wang;Weiqiang Liu;Chongyan Gu;Máire O’Neill;Fabrizio Lombardi","doi":"10.1109/OJNANO.2020.3040787","DOIUrl":null,"url":null,"abstract":"Physical unclonable function (PUF) is a lightweight security primitive for energy constrained digital systems. As an enhanced design of conventional ring oscillator (RO) PUFs, configurable ring oscillator (CRO) PUFs improve the uniqueness and reliability compared with the conventional RO PUF designs. In typical CRO PUF designs, multiplexers (MUXs) are utilized as configurable components. In this paper, a hybrid nano-scale CRO (hn-CRO) PUF is proposed. The configurable components of the proposed hnCRO PUF are implemented by RRAMs. The delay elements are based on CMOS inverters. Compared with traditional CRO PUF designs, the proposed hn-CRO PUF is cost-efficient in terms of circuit density and gate per challenge response pair (CRP) bit. To validate the proposed hn-CRO PUF, the Monte Carlo simulation results of a compact RRAM model under UMC 65 nm technology are presented. The results show that the proposed hn-CRO PUF has a good uniqueness and low hardware consumption compared with the previous works.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"128-134"},"PeriodicalIF":1.8000,"publicationDate":"2020-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3040787","citationCount":"6","resultStr":"{\"title\":\"Lightweight Configurable Ring Oscillator PUF Based on RRAM/CMOS Hybrid Circuits\",\"authors\":\"Yijun Cui;Chenghua Wang;Weiqiang Liu;Chongyan Gu;Máire O’Neill;Fabrizio Lombardi\",\"doi\":\"10.1109/OJNANO.2020.3040787\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Physical unclonable function (PUF) is a lightweight security primitive for energy constrained digital systems. As an enhanced design of conventional ring oscillator (RO) PUFs, configurable ring oscillator (CRO) PUFs improve the uniqueness and reliability compared with the conventional RO PUF designs. In typical CRO PUF designs, multiplexers (MUXs) are utilized as configurable components. In this paper, a hybrid nano-scale CRO (hn-CRO) PUF is proposed. The configurable components of the proposed hnCRO PUF are implemented by RRAMs. The delay elements are based on CMOS inverters. Compared with traditional CRO PUF designs, the proposed hn-CRO PUF is cost-efficient in terms of circuit density and gate per challenge response pair (CRP) bit. To validate the proposed hn-CRO PUF, the Monte Carlo simulation results of a compact RRAM model under UMC 65 nm technology are presented. The results show that the proposed hn-CRO PUF has a good uniqueness and low hardware consumption compared with the previous works.\",\"PeriodicalId\":446,\"journal\":{\"name\":\"IEEE Open Journal of Nanotechnology\",\"volume\":\"1 \",\"pages\":\"128-134\"},\"PeriodicalIF\":1.8000,\"publicationDate\":\"2020-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3040787\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Open Journal of Nanotechnology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/9272678/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"MATERIALS SCIENCE, MULTIDISCIPLINARY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Open Journal of Nanotechnology","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/9272678/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
Lightweight Configurable Ring Oscillator PUF Based on RRAM/CMOS Hybrid Circuits
Physical unclonable function (PUF) is a lightweight security primitive for energy constrained digital systems. As an enhanced design of conventional ring oscillator (RO) PUFs, configurable ring oscillator (CRO) PUFs improve the uniqueness and reliability compared with the conventional RO PUF designs. In typical CRO PUF designs, multiplexers (MUXs) are utilized as configurable components. In this paper, a hybrid nano-scale CRO (hn-CRO) PUF is proposed. The configurable components of the proposed hnCRO PUF are implemented by RRAMs. The delay elements are based on CMOS inverters. Compared with traditional CRO PUF designs, the proposed hn-CRO PUF is cost-efficient in terms of circuit density and gate per challenge response pair (CRP) bit. To validate the proposed hn-CRO PUF, the Monte Carlo simulation results of a compact RRAM model under UMC 65 nm technology are presented. The results show that the proposed hn-CRO PUF has a good uniqueness and low hardware consumption compared with the previous works.