{"title":"一种集成了AFE、声音处理和电源管理的听觉神经刺激芯片,用于完全植入式耳蜗植入。","authors":"Nijad Anabtawi, Sabrina Freeman, Rony Ferzli","doi":"10.1109/BHI.2016.7455974","DOIUrl":null,"url":null,"abstract":"<p><p>This paper presents a system on chip for a fully implantable cochlear implant. It includes acoustic sensor front-end, 4-channel digital sound processing and auditory nerve stimulation circuitry. It also features a digital, switched mode, single inductor dual output power supply that generates two regulated voltages; 0.4 V used to supply on-chip digital blocks and 0.9 V to supply analog blocks and charge the battery when an external RF source is detected. All passives are integrated on-chip including the inductor. The system was implemented in 14nm CMOS and validated with post layout simulations.</p>","PeriodicalId":72024,"journal":{"name":"... IEEE-EMBS International Conference on Biomedical and Health Informatics. IEEE-EMBS International Conference on Biomedical and Health Informatics","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/BHI.2016.7455974","citationCount":"1","resultStr":"{\"title\":\"An Auditory Nerve Stimulation Chip with Integrated AFE, Sound Processing, and Power Management for Fully Implantable Cochlear Implants.\",\"authors\":\"Nijad Anabtawi, Sabrina Freeman, Rony Ferzli\",\"doi\":\"10.1109/BHI.2016.7455974\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p><p>This paper presents a system on chip for a fully implantable cochlear implant. It includes acoustic sensor front-end, 4-channel digital sound processing and auditory nerve stimulation circuitry. It also features a digital, switched mode, single inductor dual output power supply that generates two regulated voltages; 0.4 V used to supply on-chip digital blocks and 0.9 V to supply analog blocks and charge the battery when an external RF source is detected. All passives are integrated on-chip including the inductor. The system was implemented in 14nm CMOS and validated with post layout simulations.</p>\",\"PeriodicalId\":72024,\"journal\":{\"name\":\"... IEEE-EMBS International Conference on Biomedical and Health Informatics. IEEE-EMBS International Conference on Biomedical and Health Informatics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/BHI.2016.7455974\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"... IEEE-EMBS International Conference on Biomedical and Health Informatics. IEEE-EMBS International Conference on Biomedical and Health Informatics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BHI.2016.7455974\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"2016/4/21 0:00:00\",\"PubModel\":\"Epub\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"... IEEE-EMBS International Conference on Biomedical and Health Informatics. IEEE-EMBS International Conference on Biomedical and Health Informatics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BHI.2016.7455974","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2016/4/21 0:00:00","PubModel":"Epub","JCR":"","JCRName":"","Score":null,"Total":0}
An Auditory Nerve Stimulation Chip with Integrated AFE, Sound Processing, and Power Management for Fully Implantable Cochlear Implants.
This paper presents a system on chip for a fully implantable cochlear implant. It includes acoustic sensor front-end, 4-channel digital sound processing and auditory nerve stimulation circuitry. It also features a digital, switched mode, single inductor dual output power supply that generates two regulated voltages; 0.4 V used to supply on-chip digital blocks and 0.9 V to supply analog blocks and charge the battery when an external RF source is detected. All passives are integrated on-chip including the inductor. The system was implemented in 14nm CMOS and validated with post layout simulations.