Lin Cheng , Zuohuan Chen , Daquan Yu , Dongfang Pan
{"title":"采用玻璃基扇出晶圆级封装的高效变压器封装隔离DC-DC转换器","authors":"Lin Cheng , Zuohuan Chen , Daquan Yu , Dongfang Pan","doi":"10.1016/j.fmre.2023.05.003","DOIUrl":null,"url":null,"abstract":"<div><div>A transformer-in-package (TiP) isolated direct current–direct current (DC-DC) converter using glass-based fan-out wafer-level packaging (FOWLP) is proposed. By using 3-layer redistribution layers (RDLs), both the transformer and interconnections are built without an additional transformer chip, and the converter only has 2 dies: a transmitter (TX) chip and a receiver (RX) chip. The proposed solution results in a significant reduction in the cost and makes major improvements in the form factor and power density. Moreover, the transformer built by the RDLs achieves a high quality factor (<em>Q</em>) and high coupling factor (<em>k</em>), and the efficiency of the converter is thus improved. The TX and RX chips were implemented in a 0.18 µm Biopolar CMOS DMOS (BCD) process and embedded in a compact package with a size of 5 mm × 5 mm. With an output capacitance of 10 µF, the converter achieves a peak efficiency of 46.5% at 0.3 W output power and a maximum delivery power of 1.25 W, achieving a maximum power density of 50 mW/mm<sup>2</sup>.</div></div>","PeriodicalId":34602,"journal":{"name":"Fundamental Research","volume":"4 6","pages":"Pages 1407-1414"},"PeriodicalIF":6.2000,"publicationDate":"2024-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A high-efficiency transformer-in-package isolated DC-DC converter using glass-based fan-out wafer-level packaging\",\"authors\":\"Lin Cheng , Zuohuan Chen , Daquan Yu , Dongfang Pan\",\"doi\":\"10.1016/j.fmre.2023.05.003\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>A transformer-in-package (TiP) isolated direct current–direct current (DC-DC) converter using glass-based fan-out wafer-level packaging (FOWLP) is proposed. By using 3-layer redistribution layers (RDLs), both the transformer and interconnections are built without an additional transformer chip, and the converter only has 2 dies: a transmitter (TX) chip and a receiver (RX) chip. The proposed solution results in a significant reduction in the cost and makes major improvements in the form factor and power density. Moreover, the transformer built by the RDLs achieves a high quality factor (<em>Q</em>) and high coupling factor (<em>k</em>), and the efficiency of the converter is thus improved. The TX and RX chips were implemented in a 0.18 µm Biopolar CMOS DMOS (BCD) process and embedded in a compact package with a size of 5 mm × 5 mm. With an output capacitance of 10 µF, the converter achieves a peak efficiency of 46.5% at 0.3 W output power and a maximum delivery power of 1.25 W, achieving a maximum power density of 50 mW/mm<sup>2</sup>.</div></div>\",\"PeriodicalId\":34602,\"journal\":{\"name\":\"Fundamental Research\",\"volume\":\"4 6\",\"pages\":\"Pages 1407-1414\"},\"PeriodicalIF\":6.2000,\"publicationDate\":\"2024-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Fundamental Research\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S2667325823001322\",\"RegionNum\":3,\"RegionCategory\":\"综合性期刊\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"Multidisciplinary\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fundamental Research","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2667325823001322","RegionNum":3,"RegionCategory":"综合性期刊","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"Multidisciplinary","Score":null,"Total":0}
A high-efficiency transformer-in-package isolated DC-DC converter using glass-based fan-out wafer-level packaging
A transformer-in-package (TiP) isolated direct current–direct current (DC-DC) converter using glass-based fan-out wafer-level packaging (FOWLP) is proposed. By using 3-layer redistribution layers (RDLs), both the transformer and interconnections are built without an additional transformer chip, and the converter only has 2 dies: a transmitter (TX) chip and a receiver (RX) chip. The proposed solution results in a significant reduction in the cost and makes major improvements in the form factor and power density. Moreover, the transformer built by the RDLs achieves a high quality factor (Q) and high coupling factor (k), and the efficiency of the converter is thus improved. The TX and RX chips were implemented in a 0.18 µm Biopolar CMOS DMOS (BCD) process and embedded in a compact package with a size of 5 mm × 5 mm. With an output capacitance of 10 µF, the converter achieves a peak efficiency of 46.5% at 0.3 W output power and a maximum delivery power of 1.25 W, achieving a maximum power density of 50 mW/mm2.