Kobold:简化缓存连接加速器的缓存一致性

IF 1.4 3区 计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Computer Architecture Letters Pub Date : 2023-04-21 DOI:10.1109/LCA.2023.3269399
Jennifer Brana;Brian C. Schwedock;Yatin A. Manerkar;Nathan Beckmann
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引用次数: 0

摘要

计算机系统中不断增长的数据移动成本正在推动一个以数据为中心的计算的新时代。最常见的以数据为中心的模式之一是近数据计算(NDC),其中加速器被放置在内存层次结构中,以避免将数据传输到核心的成本高昂。NDC系统在提高性能和能源效率方面显示出巨大潜力。不幸的是,将加速器添加到内存层次结构中会导致系统集成非常复杂,因为加速器通常需要对内存进行高速缓存一致访问。处理核心和高速缓存连接的加速器所需的复杂一致性协议导致显著更高的验证成本以及目录状态和片上网络流量的增加。此外,这些机制可能会导致缓存污染,并恶化基线处理器性能。为了简化连接缓存的加速器的集成,我们提出了Kobold,这是一种新的一致性协议和实现,它将加速器的复杂性限制在其本地瓦片上。Kobold在二级缓存中引入了一种新的目录结构,以跟踪加速器的专用缓存,并保持内核和加速器之间的一致性。对LLC协议的微小修改也使加速器能够通过绕过本地L2来提高性能。我们使用Murphi模型检查器验证了Kobold的稳定状态一致性协议,并使用Cacti 7估计了区域开销。Kobold简化了缓存连接加速器的集成,仅比基线缓存增加0.09%的面积,与现有目录一致性协议的幼稚扩展相比,提供了明显的性能优势。
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Kobold: Simplified Cache Coherence for Cache-Attached Accelerators
The ever-increasing cost of data movement in computer systems is driving a new era of data-centric computing. One of the most common data-centric paradigms is near-data computing (NDC), where accelerators are placed inside the memory hierarchy to avoid the costly transfer of data to the core. NDC systems show immense potential to improve performance and energy efficiency. Unfortunately, adding accelerators into the memory hierarchy incurs significant complexity for system integration because accelerators often require cache-coherent access to memory. The complex coherence protocols required to handle both cores and cache-attached accelerators result in significantly higher verification costs as well as an increase in directory state and on-chip network traffic. Furthermore, these mechanisms can cause cache pollution and worsen baseline processor performance. To simplify the integration of cache-attached accelerators, we present Kobold, a new coherence protocol and implementation which restricts the added complexity of an accelerator to its local tile. Kobold introduces a new directory structure within the L2 cache to track the accelerator's private cache and maintain coherence between the core and accelerator. A minor modification to the LLC protocol also enables accelerators to improve performance by bypassing the local L2. We verified Kobold's stable-state coherence protocols using the Murphi model checker and estimated area overhead using Cacti 7. Kobold simplifies integration of cache-attached accelerators, adds only 0.09% area over the baseline caches, and provides clear performance advantages versus naïve extensions of existing directory coherence protocols.
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来源期刊
IEEE Computer Architecture Letters
IEEE Computer Architecture Letters COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-
CiteScore
4.60
自引率
4.30%
发文量
29
期刊介绍: IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors, workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques, domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.
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