混合玻璃复合WLFO工艺封装模块中的W波段天线

IF 0.7 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronics International Pub Date : 2022-09-30 DOI:10.1108/mi-06-2022-0111
G. Wang, Chenhui Xia, Bo Wang, Xinran Zhao, Yang Li, Ning Yang
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引用次数: 0

摘要

目的提出了一种采用混合堆叠玻璃-复合晶圆级扇出工艺的w波段封装天线(AIP)模块。异质射频(RF)芯片集成到一个单一的模块与微尺度扇出工艺。本文旨在寻找一种多功能芯片三维集成的5G通信新策略。AIP模块由两层堆叠组成:天线层和射频层。经过结构设计和性能仿真后,制作了该模块,将8 × 8天线阵列光刻在12英寸的玻璃晶圆上以减小寄生参数的影响,并将信号馈电接口制作在玻璃基板背面。FindingsAIP模块演示尺寸为180mm × 180mm × 1mm,其功能涵盖了从天线到信号再到处理的完整射频前端链,可应用于5g通信和汽车零部件。独创性/价值将3颗射频多功能芯片和2颗TSV (through silicon via)芯片通过扇出封装工艺嵌入12英寸复合晶圆中;两层与TSV和重分布层相互连接。
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W-band antenna in package module with hybrid glass-compound WLFO process
Purpose A W-band antennas-in-packages (AIP) module with a hybrid stacked glass-compound wafer level fan-out process was presented. Heterogeneous radio frequency (RF) chips were integrated into one single module with a microscale fan-out process. This paper aims to find a new strategy for 5G communication with 3D integration of multi-function chips. Design/methodology/approach The AIP module was composed of two stacked layers: the antenna layer and RF layer. After architecture design and performance simulation, the module was fabricated, The 8 × 8 antenna array was lithography patterned on the 12 inch glass wafer to reduce the parasitic parameters effect, and the signal feeding interface was fabricated on the backside of the glass substrate. Findings AIP module demonstrates a size of 180 mm × 180mm × 1mm, and its function covers the complete RF front-end chain from the antenna to signal to process and can be applied in 5 G communication and automotive components. Originality/value With three RF multi-function chips and two through silicon via (TSV) chips were embedded in the 12 inch compound wafer through the fan-out packaging process; two layers were interconnected with TSV and re-distributed layers.
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来源期刊
Microelectronics International
Microelectronics International 工程技术-材料科学:综合
CiteScore
1.90
自引率
9.10%
发文量
28
审稿时长
>12 weeks
期刊介绍: Microelectronics International provides an authoritative, international and independent forum for the critical evaluation and dissemination of research and development, applications, processes and current practices relating to advanced packaging, micro-circuit engineering, interconnection, semiconductor technology and systems engineering. It represents a current, comprehensive and practical information tool. The Editor, Dr John Atkinson, welcomes contributions to the journal including technical papers, research papers, case studies and review papers for publication. Please view the Author Guidelines for further details. Microelectronics International comprises a multi-disciplinary study of the key technologies and related issues associated with the design, manufacture, assembly and various applications of miniaturized electronic devices and advanced packages. Among the broad range of topics covered are: • Advanced packaging • Ceramics • Chip attachment • Chip on board (COB) • Chip scale packaging • Flexible substrates • MEMS • Micro-circuit technology • Microelectronic materials • Multichip modules (MCMs) • Organic/polymer electronics • Printed electronics • Semiconductor technology • Solid state sensors • Thermal management • Thick/thin film technology • Wafer scale processing.
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