{"title":"通过最小的几何修改来减少涂有两层薄层的硅片的翘曲","authors":"Imad El Fatmi, S. Belhenini, A. Tougui","doi":"10.1108/mi-02-2022-0025","DOIUrl":null,"url":null,"abstract":"\nPurpose\nThe aim of this study is to make a contribution towards reducing the deflections of silicon wafers. The deformation of silicon wafers used in the manufacture of electronic micro-components is one of the most common problems encountered by industrialists during manufacturing. Stack warping is typically produced during the process of depositing thin layers on a substrate. This is due to the thermal-mechanical stresses caused by the difference between the thermal expansion coefficients of the materials. Reducing wafer deformation is essential to increase reliability and improve quality. In this paper, the authors propose an approach based on minimal geometrical modifications to reduce the deformation of a silicon wafer coated with two thin layers. Numerical finite element models have been developed to evaluate the impact of geometrical modifications on warping amplitude. Finite element models have been validated compared with experimental models. The results obtained are encouraging and clearly show a considerable reduction in wafer deformation.\n\n\nDesign/methodology/approach\nReducing wafer deformation is essential to increase reliability and improve quality. In this paper, the authors propose an approach based on minimal geometrical modifications to reduce the deformation of a silicon wafer coated with two thin layers. Numerical finite element models have been developed to evaluate the impact of geometrical modifications on warping amplitude. Finite element models have been validated compared with experimental models.\n\n\nFindings\nThe results obtained are encouraging and clearly show a considerable reduction in wafer deformation.\n\n\nOriginality/value\nThis paper describes the influence of geometric modification on wafer deformation. The work show also the cruciality of stress reduction in the purpose to obtain less wafer deformation.\n","PeriodicalId":49817,"journal":{"name":"Microelectronics International","volume":" ","pages":""},"PeriodicalIF":0.7000,"publicationDate":"2023-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Reduction of the warping of a silicon wafer coated with two thin layers by minimal geometric modifications\",\"authors\":\"Imad El Fatmi, S. Belhenini, A. Tougui\",\"doi\":\"10.1108/mi-02-2022-0025\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\nPurpose\\nThe aim of this study is to make a contribution towards reducing the deflections of silicon wafers. The deformation of silicon wafers used in the manufacture of electronic micro-components is one of the most common problems encountered by industrialists during manufacturing. Stack warping is typically produced during the process of depositing thin layers on a substrate. This is due to the thermal-mechanical stresses caused by the difference between the thermal expansion coefficients of the materials. Reducing wafer deformation is essential to increase reliability and improve quality. In this paper, the authors propose an approach based on minimal geometrical modifications to reduce the deformation of a silicon wafer coated with two thin layers. Numerical finite element models have been developed to evaluate the impact of geometrical modifications on warping amplitude. Finite element models have been validated compared with experimental models. The results obtained are encouraging and clearly show a considerable reduction in wafer deformation.\\n\\n\\nDesign/methodology/approach\\nReducing wafer deformation is essential to increase reliability and improve quality. In this paper, the authors propose an approach based on minimal geometrical modifications to reduce the deformation of a silicon wafer coated with two thin layers. Numerical finite element models have been developed to evaluate the impact of geometrical modifications on warping amplitude. Finite element models have been validated compared with experimental models.\\n\\n\\nFindings\\nThe results obtained are encouraging and clearly show a considerable reduction in wafer deformation.\\n\\n\\nOriginality/value\\nThis paper describes the influence of geometric modification on wafer deformation. The work show also the cruciality of stress reduction in the purpose to obtain less wafer deformation.\\n\",\"PeriodicalId\":49817,\"journal\":{\"name\":\"Microelectronics International\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":0.7000,\"publicationDate\":\"2023-04-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics International\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1108/mi-02-2022-0025\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics International","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1108/mi-02-2022-0025","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Reduction of the warping of a silicon wafer coated with two thin layers by minimal geometric modifications
Purpose
The aim of this study is to make a contribution towards reducing the deflections of silicon wafers. The deformation of silicon wafers used in the manufacture of electronic micro-components is one of the most common problems encountered by industrialists during manufacturing. Stack warping is typically produced during the process of depositing thin layers on a substrate. This is due to the thermal-mechanical stresses caused by the difference between the thermal expansion coefficients of the materials. Reducing wafer deformation is essential to increase reliability and improve quality. In this paper, the authors propose an approach based on minimal geometrical modifications to reduce the deformation of a silicon wafer coated with two thin layers. Numerical finite element models have been developed to evaluate the impact of geometrical modifications on warping amplitude. Finite element models have been validated compared with experimental models. The results obtained are encouraging and clearly show a considerable reduction in wafer deformation.
Design/methodology/approach
Reducing wafer deformation is essential to increase reliability and improve quality. In this paper, the authors propose an approach based on minimal geometrical modifications to reduce the deformation of a silicon wafer coated with two thin layers. Numerical finite element models have been developed to evaluate the impact of geometrical modifications on warping amplitude. Finite element models have been validated compared with experimental models.
Findings
The results obtained are encouraging and clearly show a considerable reduction in wafer deformation.
Originality/value
This paper describes the influence of geometric modification on wafer deformation. The work show also the cruciality of stress reduction in the purpose to obtain less wafer deformation.
期刊介绍:
Microelectronics International provides an authoritative, international and independent forum for the critical evaluation and dissemination of research and development, applications, processes and current practices relating to advanced packaging, micro-circuit engineering, interconnection, semiconductor technology and systems engineering. It represents a current, comprehensive and practical information tool. The Editor, Dr John Atkinson, welcomes contributions to the journal including technical papers, research papers, case studies and review papers for publication. Please view the Author Guidelines for further details.
Microelectronics International comprises a multi-disciplinary study of the key technologies and related issues associated with the design, manufacture, assembly and various applications of miniaturized electronic devices and advanced packages. Among the broad range of topics covered are:
• Advanced packaging
• Ceramics
• Chip attachment
• Chip on board (COB)
• Chip scale packaging
• Flexible substrates
• MEMS
• Micro-circuit technology
• Microelectronic materials
• Multichip modules (MCMs)
• Organic/polymer electronics
• Printed electronics
• Semiconductor technology
• Solid state sensors
• Thermal management
• Thick/thin film technology
• Wafer scale processing.