A Photonic Time-Interleaved ADC Architecture Based on Optical Clock Distribution and Elector-Optical Modulation Technology

A photonic time-interleaved analog-to-digital conversion (PTIADC) scheme by exploring optical clock distribution technology and elector-optical modulation technology is presented in this work. In the proposed PTIADC system, the interleaved sampling clocks for several channel analog-to-digital converters (ADCs) are implemented by optical clocks. A proof-of-concept experiment with a four-channel 400 MS/s PTIADC system has been achieved, and the performance has been experimentally demonstrated. Experimental results show that the proposed method can offer four-channel clock signals with low-timing jitters. The effective number of bits (ENOB) of the constructed PTIADC is ∼6 bits. Additionally, timing mismatch calibration via conveniently adjusting the length of optical delay lines produces a 26 dB spur suppression.